[PATCH v2 2/8] dt-bindings: apple,aic: Add CPU PMU per-cpu pseudo-interrupts

[Hector Martin]

On 01/12/2021 22.49, Marc Zyngier wrote:
> Advertise the two pseudo-interrupts that tied to the two PMU
> flavours present in the Apple M1 SoC.
> 
> We choose the expose two different pseudo-interrupts to the OS
> as the e-core PMU is obviously different from the p-core one,
> effectively presenting two different devices.
> 
> Acked-by: Rob Herring <robh at kernel.org>
> Signed-off-by: Marc Zyngier <maz at kernel.org>
> ---
>   .../devicetree/bindings/interrupt-controller/apple,aic.yaml     | 2 ++
>   include/dt-bindings/interrupt-controller/apple-aic.h            | 2 ++
>   2 files changed, 4 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
> index cf6c091a07b1..b95e41816953 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
> @@ -56,6 +56,8 @@ properties:
>             - 1: virtual HV timer
>             - 2: physical guest timer
>             - 3: virtual guest timer
> +          - 4: 'efficient' CPU PMU
> +          - 5: 'performance' CPU PMU
>   
>         The 3rd cell contains the interrupt flags. This is normally
>         IRQ_TYPE_LEVEL_HIGH (4).
> diff --git a/include/dt-bindings/interrupt-controller/apple-aic.h b/include/dt-bindings/interrupt-controller/apple-aic.h
> index 604f2bb30ac0..bf3aac0e5491 100644
> --- a/include/dt-bindings/interrupt-controller/apple-aic.h
> +++ b/include/dt-bindings/interrupt-controller/apple-aic.h
> @@ -11,5 +11,7 @@
>   #define AIC_TMR_HV_VIRT		1
>   #define AIC_TMR_GUEST_PHYS	2
>   #define AIC_TMR_GUEST_VIRT	3
> +#define AIC_CPU_PMU_E		4
> +#define AIC_CPU_PMU_P		5
>   
>   #endif
> 

Reviewed-by: Hector Martin <marcan at marcan.st>

-- 
Hector Martin (marcan at marcan.st)
Public Key: https://mrcn.st/pub