[PATCH v9 3/7] dt-bindings: PCI: Add bindings for Brcmstb EP voltage regulators

[Jim Quinlan]

On Tue, Dec 7, 2021 at 3:17 PM Rob Herring <robh at kernel.org> wrote:
>
> On Fri, Nov 19, 2021 at 05:07:50PM -0500, Jim Quinlan wrote:
> > Add bindings for Brcmstb EP voltage regulators.  A new mechanism is to be
> > added to the Linux PCI subsystem that will allocate and turn on/off
> > regulators.  These are standard regulators -- vpcie12v, vpcie3v3, and
> > vpcie3v3aux -- placed in the DT in the bridge node under the host bridge
> > device.
> >
> > The use of a regulator property in the pcie EP subnode such as
> > "vpcie12v-supply" depends on a pending pullreq to the pci-bus.yaml
> > file at
> >
> > https://github.com/devicetree-org/dt-schema/pull/63
> >
> > Signed-off-by: Jim Quinlan <jim2101024 at gmail.com>
> > ---
> >  .../bindings/pci/brcm,stb-pcie.yaml           | 23 +++++++++++++++++++
> >  1 file changed, 23 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> > index 22f2ef446f18..7113a7f726e7 100644
> > --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> > +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> > @@ -159,5 +159,28 @@ examples:
> >                                   <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>;
> >                      brcm,enable-ssc;
> >                      brcm,scb-sizes =  <0x0000000080000000 0x0000000080000000>;
> > +
> > +                    /* PCIe bridge */
>
> Root port specifically. Didn't Pali mention that before?
Yes,  my miss, will fix.
>
> > +                    pci at 0,0 {
> > +                            #address-cells = <3>;
> > +                            #size-cells = <2>;
> > +                            reg = <0x0 0x0 0x0 0x0 0x0>;
> > +                            compatible = "pciclass,0604";
> > +                            device_type = "pci";
> > +                            vpcie3v3-supply = <&vreg7>;
> > +                            ranges;
> > +
> > +                            /* PCIe endpoint */
> > +                            pci-ep at 0,0 {
> > +                                    assigned-addresses =
> > +                                        <0x82010000 0x0 0xf8000000 0x6 0x00000000 0x0 0x2000>;
> > +                                    reg = <0x0 0x0 0x0 0x0 0x0>;
> > +                                    compatible = "pci14e4,1688";
>
> > +                                    #address-cells = <3>;
> > +                                    #size-cells = <2>;
> > +
> > +                                    ranges;
>
> These aren't appropriate for an endpoint.
Got it.

Do you have feedback for any of the other commits?

Thanks,
Jim Quinlan
Broadcom STB

>
> > +                            };
> > +                    };
> >              };
> >      };
> > --
> > 2.17.1
> >
> >