[PATCH v5 3/6] arm64: dts: ti: k3-j721e: Add support for MCAN nodes
Apurva Nandan
a-nandan at ti.com
Tue Dec 7 05:20:24 PST 2021
On 22/11/21 7:11 pm, Aswath Govindraju wrote:
> From: Faiz Abbas <faiz_abbas at ti.com>
>
> Add support for 14 MCAN controllers in main domain and 2 MCAN controllers
> present in mcu domain. All the MCAN controllers support classic CAN
> messages as well as CAN_FD messages.
>
> Signed-off-by: Faiz Abbas <faiz_abbas at ti.com>
> Signed-off-by: Aswath Govindraju <a-govindraju at ti.com>
Reviewed-by: Apurva Nandan <a-nandan at ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 196 ++++++++++++++++++
> .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 28 +++
> 2 files changed, 224 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> index 08c8d1b47dcd..08a30c21e6b7 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> @@ -1940,4 +1940,200 @@
> bus_freq = <1000000>;
> };
> };
> +
> + main_mcan0: can at 2701000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x02701000 0x00 0x200>,
> + <0x00 0x02708000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 156 0>, <&k3_clks 156 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> +
> + main_mcan1: can at 2711000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x02711000 0x00 0x200>,
> + <0x00 0x02718000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 158 0>, <&k3_clks 158 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> +
> + main_mcan2: can at 2721000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x02721000 0x00 0x200>,
> + <0x00 0x02728000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 160 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 160 0>, <&k3_clks 160 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> +
> + main_mcan3: can at 2731000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x02731000 0x00 0x200>,
> + <0x00 0x02738000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 161 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 161 0>, <&k3_clks 161 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> +
> + main_mcan4: can at 2741000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x02741000 0x00 0x200>,
> + <0x00 0x02748000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 162 0>, <&k3_clks 162 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> +
> + main_mcan5: can at 2751000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x02751000 0x00 0x200>,
> + <0x00 0x02758000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 163 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 163 0>, <&k3_clks 163 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> +
> + main_mcan6: can at 2761000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x02761000 0x00 0x200>,
> + <0x00 0x02768000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 164 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 164 0>, <&k3_clks 164 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> +
> + main_mcan7: can at 2771000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x02771000 0x00 0x200>,
> + <0x00 0x02778000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 165 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 165 0>, <&k3_clks 165 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> +
> + main_mcan8: can at 2781000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x02781000 0x00 0x200>,
> + <0x00 0x02788000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 166 0>, <&k3_clks 166 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 577 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> +
> + main_mcan9: can at 2791000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x02791000 0x00 0x200>,
> + <0x00 0x02798000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 167 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 167 0>, <&k3_clks 167 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> +
> + main_mcan10: can at 27a1000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x027a1000 0x00 0x200>,
> + <0x00 0x027a8000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 168 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 168 0>, <&k3_clks 168 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> +
> + main_mcan11: can at 27b1000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x027b1000 0x00 0x200>,
> + <0x00 0x027b8000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 169 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 169 0>, <&k3_clks 169 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> +
> + main_mcan12: can at 27c1000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x027c1000 0x00 0x200>,
> + <0x00 0x027c8000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 170 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 170 0>, <&k3_clks 170 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> +
> + main_mcan13: can at 27d1000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x027d1000 0x00 0x200>,
> + <0x00 0x027d8000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 171 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 171 0>, <&k3_clks 171 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> };
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
> index d2dceda72fe9..b4972dfb7da8 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
> @@ -390,4 +390,32 @@
> ti,loczrama = <1>;
> };
> };
> +
> + mcu_mcan0: can at 40528000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x40528000 0x00 0x200>,
> + <0x00 0x40500000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 172 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 172 0>, <&k3_clks 172 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 833 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> +
> + mcu_mcan1: can at 40568000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x40568000 0x00 0x200>,
> + <0x00 0x40540000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 173 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 173 0>, <&k3_clks 173 1>;
> + clock-names = "hclk", "cclk";
> + interrupts = <GIC_SPI 835 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + };
> };
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