[PATCH] PCI: mediatek: Delay 100ms to wait power and clock to become stable

[Bjorn Helgaas]

In the subject:

  PCI: mediatek: Assert PERST# for 100ms for power and clock to stabilize

On Tue, Dec 07, 2021 at 02:05:50PM +0800, qizhong cheng wrote:
> Described in PCIe CEM specification setctions 2.2 (PERST# Signal) and
> 2.2.1 (Initial Power-Up (G3 to S0)). The deassertion of PERST# should
> be delayed 100ms (TPVPERL) for the power and clock to become stable.

Please fix the typos above and in the comment below: "setctions"
should be "sections".

I mentioned this yesterday:
https://lore.kernel.org/all/20211207015323.GA26237@bhelgaas/

But maybe the "s/setctions/sections/" notation wasn't obvious.
This is used in sed, vi, and other tools, and it is a command
that searches for the first regular expression ("setctions") and
replaces it with the second ("sections").

> Signed-off-by: qizhong cheng <qizhong.cheng at mediatek.com>
> Change-Id: Ia9abe1e763564a5bad1d045fd268c38e76e2ae95

No need for the "Change-Id".  I assume this came from a gerrit server
somewhere, but unless there's something to tell us *which* server that
is, and unless that server is public, this isn't really useful.

> ---
>  drivers/pci/controller/pcie-mediatek.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
> index 2f3f974977a3..a61ea3940471 100644
> --- a/drivers/pci/controller/pcie-mediatek.c
> +++ b/drivers/pci/controller/pcie-mediatek.c
> @@ -702,6 +702,13 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
>  	 */
>  	writel(PCIE_LINKDOWN_RST_EN, port->base + PCIE_RST_CTRL);
>  
> +	/*
> +	 * Described in PCIe CEM specification setctions 2.2 (PERST# Signal) and
> +	 * 2.2.1 (Initial Power-Up (G3 to S0)). The deassertion of PERST# should
> +	 * be delayed 100ms (TPVPERL) for the power and clock to become stable.
> +	 */
> +	msleep(100);
> +
>  	/* De-assert PHY, PE, PIPE, MAC and configuration reset	*/
>  	val = readl(port->base + PCIE_RST_CTRL);
>  	val |= PCIE_PHY_RSTB | PCIE_PERSTB | PCIE_PIPE_SRSTB |
> -- 
> 2.25.1
>