[PATCH] arm64: dts: k3-j721e: correct cache-sets info

Vignesh Raghavendra vigneshr at ti.com
Mon Dec 6 05:29:22 PST 2021


Hi Peng Fan (OSS),
 
On Fri, 12 Nov 2021 14:31:55 +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan at nxp.com>
> 
> A72 Cluster has 48KB Icache, 32KB Dcache and 1MB L2 Cache
>  - ICache is 3-way set-associative
>  - Dcache is 2-way set-associative
>  - Line size are 64bytes
> 
> [...]
 
I have applied the following to branch ti-k3-dts-next on [1].

Fixed $subject as suggested by Nishanth.

Thank you!
 
[1/1] arm64: dts: k3-j721e: correct cache-sets info
      commit: 7a0df1f969c14939f60a7f9a6af72adcc314675f
 
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
 
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
 
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
 
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
 
[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh




More information about the linux-arm-kernel mailing list