[PATCH v5 08/10] irqchip: Add Sunplus SP7021 interrupt controller driver

[kernel test robot]

Hi Qin,

I love your patch! Perhaps something to improve:

[auto build test WARNING on clk/clk-next]
[cannot apply to pza/reset/next robh/for-next tip/irq/core linus/master v5.16-rc3 next-20211203]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Qin-Jian/Add-Sunplus-SP7021-SoC-Support/20211203-154345
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: ia64-allyesconfig (https://download.01.org/0day-ci/archive/20211204/202112040151.1DH0alac-lkp@intel.com/config)
compiler: ia64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/14961fb5913762db86b6816b325ef2e87cf4a319
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Qin-Jian/Add-Sunplus-SP7021-SoC-Support/20211203-154345
        git checkout 14961fb5913762db86b6816b325ef2e87cf4a319
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=ia64 SHELL=/bin/bash drivers/irqchip/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>

All warnings (new ones prefixed by >>):

   drivers/irqchip/irq-sp7021-intc.c: In function 'sp_intc_handle_ext_cascaded':
>> drivers/irqchip/irq-sp7021-intc.c:160:23: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
     160 |         int ext_num = (int)irq_desc_get_handler_data(desc);
         |                       ^
   drivers/irqchip/irq-sp7021-intc.c: In function 'sp_intc_irq_map':
>> drivers/irqchip/irq-sp7021-intc.c:218:76: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
     218 |         irq_set_chained_handler_and_data(irq, sp_intc_handle_ext_cascaded, (void *)i);
         |                                                                            ^
   drivers/irqchip/irq-sp7021-intc.c: At top level:
   drivers/irqchip/irq-sp7021-intc.c:223:6: warning: no previous prototype for 'sp_intc_set_ext' [-Wmissing-prototypes]
     223 | void sp_intc_set_ext(u32 hwirq, int ext_num)
         |      ^~~~~~~~~~~~~~~
   drivers/irqchip/irq-sp7021-intc.c:229:12: warning: no previous prototype for 'sp_intc_init_dt' [-Wmissing-prototypes]
     229 | int __init sp_intc_init_dt(struct device_node *node, struct device_node *parent)
         |            ^~~~~~~~~~~~~~~


vim +160 drivers/irqchip/irq-sp7021-intc.c

   156	
   157	static void sp_intc_handle_ext_cascaded(struct irq_desc *desc)
   158	{
   159		struct irq_chip *chip = irq_desc_get_chip(desc);
 > 160		int ext_num = (int)irq_desc_get_handler_data(desc);
   161		int hwirq;
   162	
   163		chained_irq_enter(chip, desc);
   164	
   165		while ((hwirq = sp_intc_get_ext_irq(ext_num)) >= 0) {
   166			if (unlikely(IS_GPIO_INT(hwirq) && TEST_STATE(hwirq, _IS_ACTIVE))) { // WORKAROUND
   167				ASSIGN_STATE(hwirq, _IS_ACTIVE, false);
   168				sp_intc_assign_bit(hwirq, REG_INTR_POLARITY, TEST_STATE(hwirq, _IS_LOW));
   169			} else {
   170				generic_handle_domain_irq(sp_intc.domain, hwirq);
   171			}
   172		}
   173	
   174		chained_irq_exit(chip, desc);
   175	}
   176	
   177	#ifdef CONFIG_SMP
   178	static int sp_intc_set_affinity(struct irq_data *d, const struct cpumask *mask, bool force)
   179	{
   180		return -EINVAL;
   181	}
   182	#endif
   183	
   184	static struct irq_chip sp_intc_chip = {
   185		.name = "sp_intc",
   186		.irq_ack = sp_intc_ack_irq,
   187		.irq_mask = sp_intc_mask_irq,
   188		.irq_unmask = sp_intc_unmask_irq,
   189		.irq_set_type = sp_intc_set_type,
   190	#ifdef CONFIG_SMP
   191		.irq_set_affinity = sp_intc_set_affinity,
   192	#endif
   193	};
   194	
   195	static int sp_intc_irq_domain_map(struct irq_domain *domain,
   196					  unsigned int irq, irq_hw_number_t hwirq)
   197	{
   198		irq_set_chip_and_handler(irq, &sp_intc_chip, handle_level_irq);
   199		irq_set_chip_data(irq, &sp_intc_chip);
   200		irq_set_noprobe(irq);
   201	
   202		return 0;
   203	}
   204	
   205	static const struct irq_domain_ops sp_intc_dm_ops = {
   206		.xlate = irq_domain_xlate_twocell,
   207		.map = sp_intc_irq_domain_map,
   208	};
   209	
   210	static int sp_intc_irq_map(struct device_node *node, int i)
   211	{
   212		unsigned int irq;
   213	
   214		irq = irq_of_parse_and_map(node, i);
   215		if (!irq)
   216			return -ENOENT;
   217	
 > 218		irq_set_chained_handler_and_data(irq, sp_intc_handle_ext_cascaded, (void *)i);
   219	
   220		return 0;
   221	}
   222	

---
0-DAY CI Kernel Test Service, Intel Corporation
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