[PATCH] PCI: brcmstb: Declare a bitmap as a bitmap, not as a plain 'unsigned long'

Dan Carpenter dan.carpenter at oracle.com
Fri Dec 3 03:02:48 PST 2021


On Tue, Nov 30, 2021 at 11:04:17AM -0600, Bjorn Helgaas wrote:
> > +	/* Used indicates which MSI interrupts have been alloc'd. 'nr' bellow is
> > +	   the real size of the bitmap. It depends on the chip. */
> 
> I hate to bike-shed this even more, but IMO we should just drop the
> comment above completely.  It's not the usual commenting style, no
> other drivers provide similar explanation, and "below" is misspelled,
> which will lead to a future fixup patch.
> 

There a bunch of these...

$ git grep -wi bellow
Documentation/input/devices/ntrig.rst:|min_height,              |size threshold bellow which fingers are ignored      |
Documentation/networking/arcnet-hardware.rst:the I/O address space bellow 0x200 is RESERVED for mainboard, so
Documentation/networking/regulatory.rst:Bellow is a simple example, with a regulatory domain cached using the stack.
Documentation/security/digsig.rst:of the key: 5D2B05FC633EE3E8 in the example bellow.
Documentation/sound/alsa-configuration.rst:    bitmap of available external inputs for FX8010 (see bellow)
Documentation/sound/alsa-configuration.rst:    bitmap of available external outputs for FX8010 (see bellow)
arch/arm/mach-s3c/mach-mini2440.c: * This macro simplifies the table bellow
arch/arm/mm/kasan_init.c:        * At first we should unmap early shadow (clear_pgds() call bellow).
arch/arm/mm/pmsa-v7.c:                 * data access till we setup RAM bellow would be done
arch/mips/include/asm/sgi/mc.h:  * be the same size. The size encoding for supported SIMMs is bellow */
drivers/edac/sb_edac.c:  * algorithm bellow.
drivers/edac/sb_edac.c:  * The check bellow is probably enough to fill all cases where
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c: * The 2 macros bellow represent the actual size in bytes that
drivers/gpu/drm/i915/display/intel_psr.c:                * comments bellow for more information
drivers/gpu/drm/i915/gt/shaders/README:The instructions bellow assume:
drivers/gpu/drm/rockchip/cdn-dp-reg.h:/* bellow registers need access by mailbox */
drivers/gpu/drm/sun4i/sun8i_mixer.h: * Sub-engines listed bellow are unused for now. The EN registers are here only
drivers/gpu/drm/tidss/tidss_dispc_regs.h: * macros bellow can be used.
drivers/gpu/drm/tidss/tidss_plane.c:     * (the two first checks bellow). At the end of a row the HW
drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h:/* Refer to the Register Bit Masks bellow for the naming of each register and */
drivers/net/ethernet/freescale/fman/fman_port.c:        /* The code bellow is a trick so the FM will not release the buffer
drivers/net/wireless/ath/ath6kl/wmi.h:  /* lowest of bellow */
drivers/net/wireless/ath/ath6kl/wmi.h:  /* highest of bellow */
drivers/net/wireless/ath/ath6kl/wmi.h:  /* lowest of bellow */
drivers/net/wireless/ath/ath6kl/wmi.h:  /* highest of bellow */
drivers/net/wireless/ath/wcn36xx/wcn36xx.h: * used in both SMD channel and TX BD. See table bellow when it is used.
drivers/power/supply/adp5061.c:          * bellow this value, weak charge mode is entered
drivers/pwm/pwm-stm32.c:                scale = priv->max_arr; /* bellow resolution, use max scale */
drivers/thermal/ti-soc-thermal/dra752-bandgap.h: * All the macros bellow define the required bits for
drivers/thermal/ti-soc-thermal/dra752-bandgap.h: * All the macros bellow are definitions for handling the
drivers/thermal/ti-soc-thermal/omap4xxx-bandgap.h: * All the macros bellow define the required bits for
drivers/thermal/ti-soc-thermal/omap4xxx-bandgap.h: * All the macros bellow are definitions for handling the
drivers/thermal/ti-soc-thermal/omap4xxx-bandgap.h: * All the macros bellow define the required bits for
drivers/thermal/ti-soc-thermal/omap4xxx-bandgap.h: * All the macros bellow are definitions for handling the
drivers/thermal/ti-soc-thermal/omap5xxx-bandgap.h: * All the macros bellow define the required bits for
drivers/thermal/ti-soc-thermal/omap5xxx-bandgap.h: * All the macros bellow are definitions for handling the
drivers/video/fbdev/omap2/omapfb/dss/hdmi.h:    /* This lock should be taken when booleans bellow are touched. */
drivers/video/fbdev/via/lcd.c:  DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n");
sound/soc/codecs/tlv320aic31xx.c:               /* See bellow for details how fix this. */
tools/perf/builtin-help.c:      char *page_path; /* it leaks but we exec bellow */

regards,
dan carpenter




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