[PATCH 2/2] irqchip: nvic: Use GENERIC_IRQ_MULTI_HANDLER

[Vladimir Murzin]

On 12/2/21 4:46 PM, Ard Biesheuvel wrote:
> On Thu, 2 Dec 2021 at 15:12, Vladimir Murzin <vladimir.murzin at arm.com> wrote:
>>
>> On 12/2/21 11:05 AM, Ard Biesheuvel wrote:
>>> On Thu, 2 Dec 2021 at 10:45, Arnd Bergmann <arnd at arndb.de> wrote:
>>>>
>>>> On Thu, Dec 2, 2021 at 10:33 AM Vladimir Murzin <vladimir.murzin at arm.com> wrote:
>>>>>
>>>>> On 12/2/21 9:23 AM, Arnd Bergmann wrote:
>>>>>> On Thu, Dec 2, 2021 at 9:35 AM Ard Biesheuvel <ardb at kernel.org> wrote:
>>>>>>>
>>>>>>> It seems trivial enough to add that for v7m as well, so I will include
>>>>>>> a patch for it in my v3. But I won't be able to test it, though.
>>>>>>
>>>>>> Ok, perfect. Adding Jesse to Cc, they are in the process of adding another
>>>>>> Cortex-M based platform and should be able to test this by merging in your
>>>>>> changes from [1] after you have uploaded the latest version.
>>>>>
>>>>> I'm happy to test it as well. I'm wondering if there are specific scenarios
>>>>> (or maybe some tests) to consider?
>>>>
>>>> If the IRQ stacks fail in some way, it most likely won't boot at all, so as long
>>>> as you can get into user space, I'd be 99% confident that it's good.
>>>>
>>>> For the MMU based platforms, the series lets us detect stack overflows
>>>> when either the per-thread stack or the IRQ stack runs into an unmapped
>>>> vmalloc page, and there are some unit tests that exercise this.
>>>> I don't think you can do this with the MPU though, and certainly not when
>>>> the MPU is disabled.
>>>>
>>>
>>> Latest version of the code is here, if anyone wants to test it:
>>> https://git.kernel.org/pub/scm/linux/kernel/git/ardb/linux.git/log/?h=arm-up-ti-in-task-v3
>>>
>>
>> I'm afraid it is broken (even w/o last patch). I'm getting
>>
>> [    0.071350] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
>> [    0.071747] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
>> [    0.084497] bad: scheduling from the idle thread!
>> [    0.084744] CPU: 0 PID: 0 Comm: kworker/0:0H Not tainted 5.16.0-rc1-0f57a2aad139 #2428
>> [    0.085357] Hardware name: Generic DT based system
>>
>> $ git bisect log
>> git bisect start
>> # good: [fa55b7dcdc43c1aa1ba12bca9d2dd4318c2a0dbf] Linux 5.16-rc1
>> git bisect good fa55b7dcdc43c1aa1ba12bca9d2dd4318c2a0dbf
>> # bad: [e42c59caa4d8f37444388cc388bfc55653bf00dc] ARM: v7m: enable support for IRQ stacks
>> git bisect bad e42c59caa4d8f37444388cc388bfc55653bf00dc
>> # good: [cbf7b30e70b7e2eacebd885674675746e93583f6] ARM: entry: rework stack realignment code in svc_entry
>> git bisect good cbf7b30e70b7e2eacebd885674675746e93583f6
>> # good: [02c0315277721c4fc2082850da0714127594473d] irqchip: nvic: Use GENERIC_IRQ_MULTI_HANDLER
>> git bisect good 02c0315277721c4fc2082850da0714127594473d
>> # good: [9cc24032abc2847a8e61e55e2ec9bd34e1eff1c4] ARM: percpu: add SMP_ON_UP support
>> git bisect good 9cc24032abc2847a8e61e55e2ec9bd34e1eff1c4
>> # good: [8adfea395669037ee79620b8b534e101d5ce65e6] ARM: smp: defer TPIDRURO update for SMP v6 configurations too
>> git bisect good 8adfea395669037ee79620b8b534e101d5ce65e6
>> # bad: [0f57a2aad13912dde5746ffc5f43bd46aa3d8b2d] ARM: implement THREAD_INFO_IN_TASK for uniprocessor systems
>> git bisect bad 0f57a2aad13912dde5746ffc5f43bd46aa3d8b2d
>> # first bad commit: [0f57a2aad13912dde5746ffc5f43bd46aa3d8b2d] ARM: implement THREAD_INFO_IN_TASK for uniprocessor systems
>>
>> At the first glance it seems that __switch_to in entry-v7m.S missing set_current
>>
> 
> Thanks for testing, and thanks for bisecting. Unfortunately, I can't
> easily test these changes myself.
> 
> Could you please check whether the following change would be
> sufficient to fix this?
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/ardb/linux.git/commit/?h=tmp
> 

Booted fine now.

$ cat /proc/interrupts

           CPU0       
 16:         25  nvic_irq   4 Edge      mps2-clkevt
 17:          0  nvic_irq  32 Edge      mps2-uart-rx
 18:       1124  nvic_irq  33 Edge      mps2-uart-tx
 19:          0  nvic_irq  47 Edge      mps2-uart-overrun
Err:          0

Note: 0 interrupts for mps2-uart-rx is expected since it is automated
environment

Cheers
Vladimir

> Thanks,
> Ard.
>