[PATCH v3 2/4] watchdog: da9062: reset board on watchdog timeout

[Christoph Niedermaier]

From: Adam Thomson [mailto:Adam.Thomson.Opensource at diasemi.com]
Sent: Thursday, December 2, 2021 1:12 PM
> On 02 December 2021 07:43, Andrej Picej wrote:
>>> I have a question how to correctly restart the system after
>>> watchdog timeout.
>>> If I understand it correct after watchdog timeout the system
>>> restarts only if WATCHDOG_SD (Bit 3) in register CONFIG_I is
>>> set.
>>> What is the difference if WATCHDOG_SD isn't set, but WAKE_UP
>>> (Bit 2) in register CONTROL_F is set? From outside on my
>>> system I observe the same behavior. After watchdog timeout
>>> my system restarts. So where are the differences?
>>> It would be nice if you could answer this question, as you
>>> certainly know this chip very well.
>>
>> To be honest I don't really know the chip that well, I'm just trying to
>> add this feature and hopefully help others if they run into the same
>> problem. I think @Adam will be more helpful here.
>>
>> But from quick look at da9062 datasheet, mainly chapter "8.8 Power
>> Modes" I see next main differences:
>> - setting WATCHDOG_SD enables SHUTDOWN sequence when the watchdog
>> timeout is triggered. This puts the chip (da9062) in RESET mode.
>> Taken from DA9062 datasheet:
>> > In RESET mode, the internal supplies, and LDO1 (if configured as an always-on supply) are enabled.
>> > All other DA9062 supplies are disabled.
>> > DA9062 is in RESET mode whenever a complete application shutdown is required
>> > The DA9062’s register configuration will be re-loaded from OTP when leaving the RESET mode
>>
>> - if you set the WAKE_UP bit than the chip enters POWERDOWN mode on
>> watchdog timeout. I understand the POWERDOWN mode as a not that "deep"
>> mode as a RESET mode Device will go from RESET mode to POWERDOWN mode in
>> the sequence of powering-up.
>>
>> The above explanation is just my understanding after quick look, @Adam
>> please correct me if I'm talking nonsense.
>>
>> Please have a look at the DA9062 datasheet for more information. Sorry,
>> that I can't be more helpful here.
> 
> Yes, POWERDOWN doesn't go to RESET and thus doesn't re-read OTP, so some
> settings will persist. Also, depending on the state of NRES_MODE, the nRESET
> pin
> state may or may not be modified to reset the attached processor. The
> behaviour
> of POWERDOWN and which regulators are disabled is down to the OTP
> configuration
> of the device.
> 
> For transition to POWERDOWN, if the WAKE_UP bit is set then the device will
> immediately transition back out of POWERDOWN to ACTIVE and the WAKE_UP bit
> will
> be cleared after a time.

Hi Adam,

Many thanks for your clarification.

Best regards
Christoph