[PATCH 1/7] arm64: dts: ls1028a: move pixel clock pll into /soc
Michael Walle
michael at walle.cc
Tue Aug 31 06:40:07 PDT 2021
Move it inside the /soc subnode because it is part of the CCSR space.
Signed-off-by: Michael Walle <michael at walle.cc>
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 343ecf0e8973..9a65a7118faa 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -80,13 +80,6 @@ osc_27m: clock-osc-27m {
clock-output-names = "phy_27m";
};
- dpclk: clock-controller at f1f0000 {
- compatible = "fsl,ls1028a-plldig";
- reg = <0x0 0xf1f0000 0x0 0xffff>;
- #clock-cells = <0>;
- clocks = <&osc_27m>;
- };
-
firmware {
optee: optee {
compatible = "linaro,optee-tz";
@@ -926,6 +919,13 @@ QORIQ_CLK_PLL_DIV(2)>,
status = "disabled";
};
+ dpclk: clock-controller at f1f0000 {
+ compatible = "fsl,ls1028a-plldig";
+ reg = <0x0 0xf1f0000 0x0 0x10000>;
+ #clock-cells = <0>;
+ clocks = <&osc_27m>;
+ };
+
tmu: tmu at 1f80000 {
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f80000 0x0 0x10000>;
--
2.30.2
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