[PATCH v16 01/14] counter: stm32-lptimer-cnt: Provide defines for clock polarities

Fabrice Gasnier fabrice.gasnier at foss.st.com
Tue Aug 31 06:38:50 PDT 2021



On 8/27/21 5:47 AM, William Breathitt Gray wrote:
> The STM32 low-power timer permits configuration of the clock polarity
> via the LPTIMX_CFGR register CKPOL bits. This patch provides
> preprocessor defines for the supported clock polarities.
> 
> Cc: Fabrice Gasnier <fabrice.gasnier at foss.st.com>
> Signed-off-by: William Breathitt Gray <vilhelm.gray at gmail.com>
> ---
>  drivers/counter/stm32-lptimer-cnt.c | 6 +++---
>  include/linux/mfd/stm32-lptimer.h   | 5 +++++
>  2 files changed, 8 insertions(+), 3 deletions(-)

Hi William,

You can add my:
Reviewed-by: Fabrice Gasnier <fabrice.gasnier at foss.st.com>

Thanks,
Fabrice

> 
> diff --git a/drivers/counter/stm32-lptimer-cnt.c b/drivers/counter/stm32-lptimer-cnt.c
> index 13656957c45f..7367f46c6f91 100644
> --- a/drivers/counter/stm32-lptimer-cnt.c
> +++ b/drivers/counter/stm32-lptimer-cnt.c
> @@ -140,9 +140,9 @@ static const enum counter_function stm32_lptim_cnt_functions[] = {
>  };
>  
>  enum stm32_lptim_synapse_action {
> -	STM32_LPTIM_SYNAPSE_ACTION_RISING_EDGE,
> -	STM32_LPTIM_SYNAPSE_ACTION_FALLING_EDGE,
> -	STM32_LPTIM_SYNAPSE_ACTION_BOTH_EDGES,
> +	STM32_LPTIM_SYNAPSE_ACTION_RISING_EDGE = STM32_LPTIM_CKPOL_RISING_EDGE,
> +	STM32_LPTIM_SYNAPSE_ACTION_FALLING_EDGE = STM32_LPTIM_CKPOL_FALLING_EDGE,
> +	STM32_LPTIM_SYNAPSE_ACTION_BOTH_EDGES = STM32_LPTIM_CKPOL_BOTH_EDGES,
>  	STM32_LPTIM_SYNAPSE_ACTION_NONE,
>  };
>  
> diff --git a/include/linux/mfd/stm32-lptimer.h b/include/linux/mfd/stm32-lptimer.h
> index 90b20550c1c8..06d3f11dc3c9 100644
> --- a/include/linux/mfd/stm32-lptimer.h
> +++ b/include/linux/mfd/stm32-lptimer.h
> @@ -45,6 +45,11 @@
>  #define STM32_LPTIM_PRESC	GENMASK(11, 9)
>  #define STM32_LPTIM_CKPOL	GENMASK(2, 1)
>  
> +/* STM32_LPTIM_CKPOL */
> +#define STM32_LPTIM_CKPOL_RISING_EDGE	0
> +#define STM32_LPTIM_CKPOL_FALLING_EDGE	1
> +#define STM32_LPTIM_CKPOL_BOTH_EDGES	2
> +
>  /* STM32_LPTIM_ARR */
>  #define STM32_LPTIM_MAX_ARR	0xFFFF
>  
> 



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