[PATCH v1 5/5] arm64: dts: rockchip: add mipi-dphy-tx1rx1 for rk3399

[Johan Jonker]

On 8/30/21 11:12 PM, Johan Jonker wrote:
> Hi Mikhail,
> 
> On 8/30/21 8:07 PM, Mikhail Rudenko wrote:
>> Add DT node for RX mode of RK3399 TX1RX1 D-PHY.
>>
>> Signed-off-by: Mikhail Rudenko <mike.rudenko at gmail.com>
>> ---
>>  arch/arm64/boot/dts/rockchip/rk3399.dtsi | 15 +++++++++++++++
>>  1 file changed, 15 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> index 3871c7fd83b0..2e4513275a87 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> @@ -1902,6 +1902,21 @@ mipi1_in_vopl: endpoint at 1 {
>>  		};
>>  	};
>>  


>> +	mipi_dphy_tx1rx1: mipi-dphy-tx1rx1 at ff968000 {
>> +		compatible = "rockchip,rk3399-mipi-dphy-tx1rx1";



	mipi_dsi1: mipi at ff968000 {
		compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi";
		reg = <0x0 0xff968000 0x0 0x8000>;

Sorry, there's already a node in mainline. Excuse...
See Heiko's comment.


>> +		reg = <0x0 0xff968000 0x0 0x8000>;
> 
>> +		clocks = <&cru SCLK_MIPIDPHY_REF>,
>> +			<&cru SCLK_DPHY_TX1RX1_CFG>,
>> +			<&cru PCLK_VIO_GRF>,
>> +			<&cru PCLK_MIPI_DSI1>;
>> +		clock-names = "dphy-ref", "dphy-cfg",
>> +			"grf", "dsi";
> 
> Could you fix the alignment a bit with extra spaces?
> 
>> +		rockchip,grf = <&grf>;
>> +		power-domains = <&power RK3399_PD_VIO>;
> 
> Sort in alphabetical order.
> 
>> +		#phy-cells = <0>;
>> +		status = "disabled";
>> +	};
>> +
>>  	edp: edp at ff970000 {
>>  		compatible = "rockchip,rk3399-edp";
>>  		reg = <0x0 0xff970000 0x0 0x8000>;
>>