[RFC PATCH] arm64: mm: limit linear region to 51 bits for KVM in nVHE mode

Catalin Marinas catalin.marinas at arm.com
Thu Aug 26 05:16:24 PDT 2021


On Tue, Aug 24, 2021 at 02:56:22PM +0200, Ard Biesheuvel wrote:
> On Tue, 24 Aug 2021 at 12:59, Will Deacon <will at kernel.org> wrote:
> > On Tue, Aug 10, 2021 at 06:12:44PM +0200, Ard Biesheuvel wrote:
> > > diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
> > > index 8490ed2917ff..542dad13e2fc 100644
> > > --- a/arch/arm64/mm/init.c
> > > +++ b/arch/arm64/mm/init.c
> > > @@ -282,7 +282,21 @@ static void __init fdt_enforce_memory_region(void)
> > >
> > >  void __init arm64_memblock_init(void)
> > >  {
> > > -     const s64 linear_region_size = PAGE_END - _PAGE_OFFSET(vabits_actual);
> > > +     s64 linear_region_size = PAGE_END - _PAGE_OFFSET(vabits_actual);
> > > +
> > > +     /*
> > > +      * Corner case: 52-bit VA capable systems running KVM in nVHE mode may
> > > +      * be limited in their ability to support a linear map that exceeds 51
> > > +      * bits of VA space, depending on the placement of the ID map. Given
> > > +      * that the placement of the ID map may be randomized, let's simply
> > > +      * limit the kernel's linear map to 51 bits as well if we detect this
> > > +      * configuration.
> > > +      */
> > > +     if (IS_ENABLED(CONFIG_KVM) && vabits_actual == 52 &&
> > > +         !is_kernel_in_hyp_mode()) {
> > > +             pr_info("Capping linear region to 51 bits for KVM in nVHE mode on LVA capable hardware.\n");
> > > +             linear_region_size = BIT(51);
> > > +     }
> >
> > Slight nit, but to avoid having to think about PAGE_END I think this would
> > be a little clearer as:
> >
> >         if (IS_ENABLED(CONFIG_KVM) && !is_kernel_in_hyp_mode())
> >                 linear_region_size = min_t(u64, linear_region_size, BIT(51));
> >
> 
> Fair enough.

Ard, do you plan to post a new version? I can make the change myself
locally as well.

-- 
Catalin



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