[PATCH v7 3/4] dt-bindings: pwm: add IPQ6018 binding
Rob Herring
robh at kernel.org
Wed Aug 25 08:45:54 PDT 2021
On Wed, Aug 25, 2021 at 12:48:26PM +0300, Baruch Siach wrote:
> DT binding for the PWM block in Qualcomm IPQ6018 SoC.
>
> Signed-off-by: Baruch Siach <baruch at tkos.co.il>
> ---
> v7:
>
> Use 'reg' instead of 'offset' (Rob)
>
> Drop 'clock-names' and 'assigned-clock*' (Bjorn)
>
> Use single cell address/size in example node (Bjorn)
>
> Move '#pwm-cells' lower in example node (Bjorn)
>
> List 'reg' as required
>
> v6:
>
> Device node is child of TCSR; remove phandle (Rob Herring)
>
> Add assigned-clocks/assigned-clock-rates (Uwe Kleine-König)
>
> v5: Use qcom,pwm-regs for phandle instead of direct regs (Bjorn
> Andersson, Kathiravan T)
>
> v4: Update the binding example node as well (Rob Herring's bot)
>
> v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring)
>
> v2: Make #pwm-cells const (Rob Herring)
> ---
> .../devicetree/bindings/pwm/ipq-pwm.yaml | 52 +++++++++++++++++++
> 1 file changed, 52 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/ipq-pwm.yaml
>
> diff --git a/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml b/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml
> new file mode 100644
> index 000000000000..edfec41e77e5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml
> @@ -0,0 +1,52 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pwm/ipq-pwm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm IPQ6018 PWM controller
> +
> +maintainers:
> + - Baruch Siach <baruch at tkos.co.il>
> +
> +properties:
> + "#pwm-cells":
> + const: 2
> +
> + compatible:
> + const: qcom,ipq6018-pwm
> +
> + reg:
> + description: Offset of PWM register in the TCSR block.
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - "#pwm-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
> +
> + tcsr: syscon at 1937000 {
> + compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd";
This needs to be documented. Some visibility into what else is in this
block would be nice so we can make some informed decisions as to what
all this should look like.
> + reg = <0x01937000 0x21000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + pwm: pwm at a010 {
> + compatible = "qcom,ipq6018-pwm";
> + reg = <0xa010>;
There's not a length associated with the PWM registers.
> + clocks = <&gcc GCC_ADSS_PWM_CLK>;
> + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>;
> + assigned-clock-rates = <100000000>;
> + #pwm-cells = <2>;
> + };
> + };
> --
> 2.32.0
>
>
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