[boot-wrapper PATCH 4/5] Rename kernel *_RESET values to *_KERNEL

[Mark Rutland]

Our *_RESET constants are used to initalize state for the kernel rather
than the bootwrapper itself, so for clarity we should use a *_KERNEL
suffix rather than a _RESET suffix.

Signed-off-by: Mark Rutland <mark.rutland at arm.com>
---
 arch/aarch32/boot.S            | 4 ++--
 arch/aarch32/include/asm/cpu.h | 4 ++--
 arch/aarch64/boot.S            | 4 ++--
 arch/aarch64/include/asm/cpu.h | 6 +++---
 4 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/aarch32/boot.S b/arch/aarch32/boot.S
index e397cb0..08bf932 100644
--- a/arch/aarch32/boot.S
+++ b/arch/aarch32/boot.S
@@ -76,10 +76,10 @@ ASM_FUNC(jump_kernel)
 	push	{r0 - r3}
 	mov	r5, sp
 
-	ldr	r0, =HSCTLR_RESET
+	ldr	r0, =HSCTLR_KERNEL
 	mcr	p15, 4, r0, c1, c0, 0		@ HSCTLR
 
-	ldr	r0, =SCTLR_RESET
+	ldr	r0, =SCTLR_KERNEL
 	mcr	p15, 0, r0, c1, c0, 0		@ SCTLR
 
 	/* Reset our stack pointer */
diff --git a/arch/aarch32/include/asm/cpu.h b/arch/aarch32/include/asm/cpu.h
index a7993f0..105cae5 100644
--- a/arch/aarch32/include/asm/cpu.h
+++ b/arch/aarch32/include/asm/cpu.h
@@ -13,8 +13,8 @@
 #define MPIDR_INVALID		(-1)
 
 /* Only RES1 bits and CP15 barriers for the kernel */
-#define HSCTLR_RESET		(3 << 28 | 3 << 22 | 1 << 18 | 1 << 16 | 1 << 11 | 3 << 4)
-#define SCTLR_RESET		(3 << 22 | 1 << 11 | 1 << 5 | 3 << 4)
+#define HSCTLR_KERNEL		(3 << 28 | 3 << 22 | 1 << 18 | 1 << 16 | 1 << 11 | 3 << 4)
+#define SCTLR_KERNEL		(3 << 22 | 1 << 11 | 1 << 5 | 3 << 4)
 
 #define PSR_SVC			0x13
 #define PSR_HYP			0x1a
diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
index d8d7ccd..587a25f 100644
--- a/arch/aarch64/boot.S
+++ b/arch/aarch64/boot.S
@@ -140,10 +140,10 @@ ASM_FUNC(jump_kernel)
 	mov	x22, x3
 	mov	x23, x4
 
-	ldr	x0, =SCTLR_EL1_RESET
+	ldr	x0, =SCTLR_EL1_KERNEL
 	msr	sctlr_el1, x0
 
-	ldr	x0, =SCTLR_EL2_RESET
+	ldr	x0, =SCTLR_EL2_KERNEL
 	msr	sctlr_el2, x0
 
 	cpuid	x0, x1
diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h
index 1cddbb8..63eb1c3 100644
--- a/arch/aarch64/include/asm/cpu.h
+++ b/arch/aarch64/include/asm/cpu.h
@@ -17,7 +17,7 @@
  * RES1 bits,  little-endian, caches and MMU off, no alignment checking,
  * no WXN.
  */
-#define SCTLR_EL2_RESET		(3 << 28 | 3 << 22 | 1 << 18 | 1 << 16 | 1 << 11 | 3 << 4)
+#define SCTLR_EL2_KERNEL	(3 << 28 | 3 << 22 | 1 << 18 | 1 << 16 | 1 << 11 | 3 << 4)
 
 #define SPSR_A			(1 << 8)	/* System Error masked */
 #define SPSR_D			(1 << 9)	/* Debug masked */
@@ -37,10 +37,10 @@
 
 #ifdef KERNEL_32
 /* 32-bit kernel decompressor uses CP15 barriers */
-#define SCTLR_EL1_RESET		(SCTLR_EL1_RES1 | SCTLR_EL1_CP15BEN)
+#define SCTLR_EL1_KERNEL	(SCTLR_EL1_RES1 | SCTLR_EL1_CP15BEN)
 #define SPSR_KERNEL		(SPSR_A | SPSR_I | SPSR_F | SPSR_HYP)
 #else
-#define SCTLR_EL1_RESET		SCTLR_EL1_RES1
+#define SCTLR_EL1_KERNEL	SCTLR_EL1_RES1
 #define SPSR_KERNEL		(SPSR_A | SPSR_D | SPSR_I | SPSR_F | SPSR_EL2H)
 #endif
 
-- 
2.11.0