[arm-platforms:hack/m1-pcie-v2 6/21] drivers/clk/clk-apple-gate.c:113:16: warning: no previous prototype for function 'apple_clk_hw_onecell_get'

[kernel test robot]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git hack/m1-pcie-v2
head:   2c9981b6a289354c22989e70cef0e51b9e632091
commit: 9404863043f90db4d8e377ac211584660c6acbec [6/21] clk: add support for gate clocks on Apple SoCs
config: arm64-randconfig-r016-20210822 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 79b55e5038324e61a3abf4e6a9a949c473edd858)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm64 cross compiling tool for clang build
        # apt-get install binutils-aarch64-linux-gnu
        # https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/commit/?id=9404863043f90db4d8e377ac211584660c6acbec
        git remote add arm-platforms https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git
        git fetch --no-tags arm-platforms hack/m1-pcie-v2
        git checkout 9404863043f90db4d8e377ac211584660c6acbec
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>

All warnings (new ones prefixed by >>):

>> drivers/clk/clk-apple-gate.c:113:16: warning: no previous prototype for function 'apple_clk_hw_onecell_get' [-Wmissing-prototypes]
   struct clk_hw *apple_clk_hw_onecell_get(struct of_phandle_args *clkspec,
                  ^
   drivers/clk/clk-apple-gate.c:113:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   struct clk_hw *apple_clk_hw_onecell_get(struct of_phandle_args *clkspec,
   ^
   static 
   1 warning generated.


vim +/apple_clk_hw_onecell_get +113 drivers/clk/clk-apple-gate.c

   112	
 > 113	struct clk_hw *apple_clk_hw_onecell_get(struct of_phandle_args *clkspec,
   114						void *data)
   115	{
   116		struct clk_hw *hw = NULL;
   117		struct clk_hw_onecell_data *hw_data = data;
   118		unsigned int idx = clkspec->args[0];
   119	
   120		if (idx % 8) {
   121			pr_err("%s: unaligned index: %u\n", __func__, idx);
   122			return ERR_PTR(-EINVAL);
   123		}
   124	
   125		idx /= 8;
   126		if (idx >= hw_data->num) {
   127			pr_err("%s: index out of bounds: %u\n", __func__, idx);
   128			return ERR_PTR(-EINVAL);
   129		}
   130	
   131		hw = hw_data->hws[idx];
   132		if (!hw)
   133			return ERR_PTR(-EINVAL);
   134		return hw;
   135	}
   136	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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