[PATCH V3 3/3] gpio: modepin: Add driver support for modepin GPIO controller
Michal Simek
michal.simek at xilinx.com
Mon Aug 23 01:14:11 PDT 2021
Hi Bart,
On 8/23/21 10:02 AM, Bartosz Golaszewski wrote:
> On Wed, Aug 18, 2021 at 10:11 AM Piyush Mehta <piyush.mehta at xilinx.com> wrote:
>>
>> This patch adds driver support for the zynqmp modepin GPIO controller.
>> GPIO modepin driver set and get the value and status of the PS_MODE pin,
>> based on device-tree pin configuration. These four mode pins are
>> configurable as input/output. The mode pin has a control register, which
>> have lower four-bits [0:3] are configurable as input/output, next four-bits
>> can be used for reading the data as input[4:7], and next setting the
>> output pin state output[8:11].
>>
>> Signed-off-by: Piyush Mehta <piyush.mehta at xilinx.com>
>> Acked-by: Michal Simek <michal.simek at xilinx.com>
>> Reviewed-by: Linus Walleij <linus.walleij at linaro.org>
>> ---
>
> Which tree should this go through?
I would prefer to go this via gpio tree.
Thanks,
Michal
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