[PATCH v2] clocksource/arm_arch_timer: Fix masking for high freq counters

[Marc Zyngier]

On Sun, 08 Aug 2021 20:01:10 +0100,
Oliver Upton <oupton at google.com> wrote:
> 
> On Sun, Aug 8, 2021 at 3:40 AM Marc Zyngier <maz at kernel.org> wrote:
> >
> > On Sun, 08 Aug 2021 02:14:35 +0100,
> > Oliver Upton <oupton at google.com> wrote:
> >
> > > The only other sane idea that I could come up with is providing this
> > > information to the kernel through DT, although that would leave ACPI
> > > systems behind.
> >
> > It also has the disadvantage that a large number of DT timer nodes are
> > a mess of cargo-culted, copy-pasted idioms, and that adding another
> > property would only make it worse.
> 
> Agreed, this does seem like the best solution, short of the
> architecture actually providing something to determine the counter
> width.
> 
> On that note, I wonder how (if ever) we will be able to move away from
> unnecessarily masking a 64 bit counter, i.e. a v8.6 or above
> implementation. With this patch, one such counter would wrap after
> 36.56 years, short of the 40 year guarantee we have from the
> architecture for < v8.6 implementations. Getting it to 64 bits would
> squarely make it someone else's problem ~585 years from now :)

Hmmm. If you end-up with something that falls short of 40 years, then
I suspect something is wrong in the way you compute the required
width.

40 years @1GHz (which we shall call FY1G from now on) fits comfortably
in 61 bits, and I fear that your use of ilog2() gives you one less bit
than what it should be:

log2(FY1G) ~= 60.13

What you are after is probably (ilog2(FY1G - 1) + 1), similar to the
way roundup_pow_of_two() works.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.