[PATCH] arm64: dts: exynos: correct GIC CPU interfaces address range on Exynos7

Marc Zyngier maz at kernel.org
Thu Aug 5 03:01:11 PDT 2021


On Thu, 05 Aug 2021 10:26:14 +0100,
"Alim Akhtar" <alim.akhtar at samsung.com> wrote:
> 
> Hi Krzysztof,
> 
> > -----Original Message-----
> > From: Krzysztof Kozlowski <krzysztof.kozlowski at canonical.com>
> > Sent: 05 August 2021 13:07
> > To: Rob Herring <robh+dt at kernel.org>; devicetree at vger.kernel.org; linux-
> > arm-kernel at lists.infradead.org; linux-samsung-soc at vger.kernel.org; linux-
> > kernel at vger.kernel.org
> > Cc: Alim Akhtar <alim.akhtar at samsung.com>; Chanwoo Choi
> > <cw00.choi at samsung.com>; Pankaj Dubey <pankaj.dubey at samsung.com>;
> > Sam Protsenko <semen.protsenko at linaro.org>; Marc Zyngier
> > <maz at kernel.org>
> > Subject: Re: [PATCH] arm64: dts: exynos: correct GIC CPU interfaces address
> > range on Exynos7
> > 
> > On 05/08/2021 09:21, Krzysztof Kozlowski wrote:
> > > The GIC-400 CPU interfaces address range is defined as 0x2000-0x3FFF
> > > (by ARM).
> > >
> > 
> Looking at DDI0471B_gic400_r0p1_trm.pdf, CPU interface range is
> 0x0000 ~ 0x10000

I don't where you are getting this range from. The only 64kB range I'm
aware of is the optional integration trick to cope with 64kB pages
that was documented in the initial SBSA spec. The HW itself only
decodes 8kB for the CPU interface.

	M.

-- 
Without deviation from the norm, progress is not possible.



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