[PATCH v3 07/13] ARM: dts: sti: update clkgen-fsyn entries in stih407-clock

[Patrice CHOTARD]

Hi Alain

On 3/31/21 10:42 PM, Alain Volmat wrote:
> The clkgen-fsyn driver now embed the clock names (assuming the
> right compatible is used). Remove all clock-output-names property
> and update when necessary the compatible.
> 
> Signed-off-by: Alain Volmat <avolmat at me.com>
> ---
>  arch/arm/boot/dts/stih407-clock.dtsi | 27 +++------------------------
>  1 file changed, 3 insertions(+), 24 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
> index 2603226a6ca8..9cce9541e26b 100644
> --- a/arch/arm/boot/dts/stih407-clock.dtsi
> +++ b/arch/arm/boot/dts/stih407-clock.dtsi
> @@ -93,12 +93,6 @@
>  			reg = <0x9103000 0x1000>;
>  
>  			clocks = <&clk_sysin>;
> -
> -			clock-output-names = "clk-s-c0-fs0-ch0",
> -					     "clk-s-c0-fs0-ch1",
> -					     "clk-s-c0-fs0-ch2",
> -					     "clk-s-c0-fs0-ch3";
> -			clock-critical = <0>; /* clk-s-c0-fs0-ch0 */
>  		};
>  
>  		clk_s_c0: clockgen-c at 9103000 {
> @@ -150,15 +144,10 @@
>  
>  		clk_s_d0_quadfs: clk-s-d0-quadfs at 9104000 {
>  			#clock-cells = <1>;
> -			compatible = "st,quadfs";
> +			compatible = "st,quadfs-d0";
>  			reg = <0x9104000 0x1000>;
>  
>  			clocks = <&clk_sysin>;
> -
> -			clock-output-names = "clk-s-d0-fs0-ch0",
> -					     "clk-s-d0-fs0-ch1",
> -					     "clk-s-d0-fs0-ch2",
> -					     "clk-s-d0-fs0-ch3";
>  		};
>  
>  		clockgen-d0 at 9104000 {
> @@ -179,15 +168,10 @@
>  
>  		clk_s_d2_quadfs: clk-s-d2-quadfs at 9106000 {
>  			#clock-cells = <1>;
> -			compatible = "st,quadfs";
> +			compatible = "st,quadfs-d2";
>  			reg = <0x9106000 0x1000>;
>  
>  			clocks = <&clk_sysin>;
> -
> -			clock-output-names = "clk-s-d2-fs0-ch0",
> -					     "clk-s-d2-fs0-ch1",
> -					     "clk-s-d2-fs0-ch2",
> -					     "clk-s-d2-fs0-ch3";
>  		};
>  
>  		clockgen-d2 at 9106000 {
> @@ -210,15 +194,10 @@
>  
>  		clk_s_d3_quadfs: clk-s-d3-quadfs at 9107000 {
>  			#clock-cells = <1>;
> -			compatible = "st,quadfs";
> +			compatible = "st,quadfs-d3";
>  			reg = <0x9107000 0x1000>;
>  
>  			clocks = <&clk_sysin>;
> -
> -			clock-output-names = "clk-s-d3-fs0-ch0",
> -					     "clk-s-d3-fs0-ch1",
> -					     "clk-s-d3-fs0-ch2",
> -					     "clk-s-d3-fs0-ch3";
>  		};
>  
>  		clockgen-d3 at 9107000 {
> 
Reviewed-by: Patrice Chotard <patrice.chotard at foss.st.com>

Thanks
Patrice