[PATCHv2 09/11] arm64: entry: fix non-NMI kernel<->kernel transitions

Zenghui Yu yuzenghui at huawei.com
Tue Apr 27 08:15:39 BST 2021


On 2021/4/26 21:39, Zenghui Yu wrote:
> Hi Mark,
> 
> On 2021/4/26 17:21, Mark Rutland wrote:
 >
>> diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
>> index 6acfc5e6b5e0..7d46c74a8706 100644
>> --- a/arch/arm64/kernel/entry.S
>> +++ b/arch/arm64/kernel/entry.S
>> @@ -292,6 +292,8 @@ alternative_else_nop_endif
>>  alternative_if ARM64_HAS_IRQ_PRIO_MASKING
>>  	mrs_s	x20, SYS_ICC_PMR_EL1
>>  	str	x20, [sp, #S_PMR_SAVE]
>> +	orr	x20, x20, #GIC_PRIO_PSR_I_SET
>> +	msr_s	SYS_ICC_PMR_EL1, x20
>>  alternative_else_nop_endif
> 
> While this does fix the lockdep part, it breaks something else. The
> sleep-in-atomic one stands out (which says, I've seen other splats
> triggered with this diff), where irqs_disabled() in do_mem_abort() now
> gets confused by the updated PMR (GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET).

Seem that this can be addressed by restoring pt_regs->pmr_save into PMR
in local_daif_inherit() (before we restore the DAIF bits)?


Thanks,
Zenghui



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