[PATCH v10] arm64: dts: imx8qxp: Add jpeg encoder/decoder nodes

[Mirela Rabulea (OSS)]

Hi Aisheng,
thanks for feedback, responses below.

On Wed, 2021-04-21 at 10:12 +0000, Aisheng Dong wrote:
> + linux-arm-kernel at lists.infradead.org
> 
> > From: Mirela Rabulea (OSS) <mirela.rabulea at oss.nxp.com>
> > Sent: Wednesday, April 7, 2021 1:28 AM
> > 
> > Add dts for imaging subsytem, include jpeg nodes here.
> > Tested on imx8qxp only, should work on imx8qm, but it was not
> > tested.
> > 
> > Signed-off-by: Mirela Rabulea <mirela.rabulea at nxp.com>
> > ---
> > This was patch #7 in the initial patch set that added mxc-jpeg
> > driver
> > 
> > Changes in v10:
> >   Addressed feedback from Aisheng Dong:
> >     -Add jpeg clocks in the jpeg dts nodes.
> >     -Adapt to the recent split of the dts into subsystems:
> >      add the imaging subsystem, and place jpeg nodes there.
> > 
> >  .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 89
> > +++++++++++++++++++
> >  arch/arm64/boot/dts/freescale/imx8qxp.dtsi    |  1 +
> >  2 files changed, 90 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> > new file mode 100644
> > index 000000000000..1457d219a658
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> > @@ -0,0 +1,89 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright 2019-2021 NXP
> > + * Zhou Guoniu <guoniu.zhou at nxp.com>
> > + */
> > +img_subsys: bus at 58000000 {
> > +	compatible = "simple-bus";
> > +	#address-cells = <1>;
> > +	#size-cells = <1>;
> > +	ranges = <0x58000000 0x0 0x58000000 0x1000000>;
> > +
> > +	img_ipg_clk: clock-img-ipg {
> > +		compatible = "fixed-clock";
> > +		#clock-cells = <0>;
> > +		clock-frequency = <200000000>;
> > +		clock-output-names = "img_ipg_clk";
> > +	};
> > +
> > +	img_jpeg_dec_clk: clock-controller at 585d0000 {
> 
> s/clk/lpcg

Channged in v11

> 
> > +		compatible = "fsl,imx8qxp-lpcg";
> > +		reg = <0x585d0000 0x10000>;
> > +		#clock-cells = <1>;
> > +		clocks = <&img_ipg_clk>, <&img_ipg_clk>;
> > +		clock-indices = <IMX_LPCG_CLK_0>,
> > +				<IMX_LPCG_CLK_4>;
> > +		clock-output-names = "img_jpeg_dec_clk",
> > +				     "img_jpeg_dec_ipg_clk";
> > +		power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>;
> > +	};
> > +
> > +	img_jpeg_enc_clk: clock-controller at 585f0000 {
> 
> s/clk/lpcg

Channged in v11

> 
> > +		compatible = "fsl,imx8qxp-lpcg";
> > +		reg = <0x585f0000 0x10000>;
> > +		#clock-cells = <1>;
> > +		clocks = <&img_ipg_clk>, <&img_ipg_clk>;
> > +		clock-indices = <IMX_LPCG_CLK_0>,
> > +				<IMX_LPCG_CLK_4>;
> > +		clock-output-names = "img_jpeg_enc_clk",
> > +				     "img_jpeg_enc_ipg_clk";
> > +		power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>;
> > +	};
> > +
> > +	cameradev: camera {
> 
> Is this node necessary?

Dropped in v11

> 
> > +		compatible = "simple-bus";
> > +		#address-cells = <1>;
> > +		#size-cells = <1>;
> > +		ranges;
> > +
> > +		jpegdec: jpegdec at 58400000 {
> > +			compatible = "nxp,imx8qxp-jpgdec";
> 
> Is this compatible string upstreamed already?

Yes, it's upstreamed.

> 
> > +			reg = <0x58400000 0x00050000 >;
> > +			interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&img_jpeg_dec_clk 0>,
> > +				 <&img_jpeg_dec_clk 1>;
> 
> Is the index correct here?

Yes, per is for the lower 16 bits (15:0) of LPCG_MJPEG_COMMON_DEC_REGS,
and ipg for the upper 16-bits (31:16) of LPCG_MJPEG_COMMON_DEC_REGS.
The IMX_LPCG_CLK_4 is 16.

> 
> > +			clock-names = "per", "ipg";
> > +			assigned-clocks = <&img_jpeg_dec_clk 0>,
> > +					  <&img_jpeg_dec_clk 1>;
> > +			assigned-clock-rates = <200000000>;
> 
> Mismatch with assigned-clocks

Aligned in v11.

> 
> > +			power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
> > +					<&pd IMX_SC_R_MJPEG_DEC_S0>,
> > +					<&pd IMX_SC_R_MJPEG_DEC_S1>,
> > +					<&pd IMX_SC_R_MJPEG_DEC_S2>,
> > +					<&pd IMX_SC_R_MJPEG_DEC_S3>;
> > +		};
> > +
> > +		jpegenc: jpegenc at 58450000 {
> > +			compatible = "nxp,imx8qxp-jpgenc";
> > +			reg = <0x58450000 0x00050000 >;
> > +			interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&img_jpeg_enc_clk 0>,
> > +				 <&img_jpeg_enc_clk 1>;
> 
> Ditto
> 
> > +			clock-names = "per", "ipg";
> > +			assigned-clocks = <&img_jpeg_enc_clk 0>,
> > +					  <&img_jpeg_enc_clk 1>;
> > +			assigned-clock-rates = <200000000>;
> 
> Ditto
> 
> > +			power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
> > +					<&pd IMX_SC_R_MJPEG_ENC_S0>,
> > +					<&pd IMX_SC_R_MJPEG_ENC_S1>,
> > +					<&pd IMX_SC_R_MJPEG_ENC_S2>,
> > +					<&pd IMX_SC_R_MJPEG_ENC_S3>;
> > +		};
> > +	};
> > +};
> 
> Regards
> Aisheng
> 
> > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > index 1e6b4995091e..2d9589309bd0 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > @@ -258,6 +258,7 @@
> >  	};
> > 
> >  	/* sorted in register address */
> > +	#include "imx8-ss-img.dtsi"
> >  	#include "imx8-ss-adma.dtsi"
> >  	#include "imx8-ss-conn.dtsi"
> >  	#include "imx8-ss-ddr.dtsi"
> > --
> > 2.17.1
> 
>