[v3,PATCH 2/3] pwm: mtk_disp: convert the driver to atomic API

kernel test robot lkp at intel.com
Tue Apr 6 15:52:35 BST 2021


Hi Rex-BC,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on v5.12-rc6]
[also build test WARNING on next-20210401]
[cannot apply to pwm/for-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Rex-BC-Chen/Convert-the-mtk_disp-driver-to-aotmic-API/20210406-180018
base:    e49d033bddf5b565044e2abe4241353959bc9120
config: xtensa-allyesconfig (attached as .config)
compiler: xtensa-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/0a2486ac437e3b8d36a0bf8ce9648c22e42ffda4
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Rex-BC-Chen/Convert-the-mtk_disp-driver-to-aotmic-API/20210406-180018
        git checkout 0a2486ac437e3b8d36a0bf8ce9648c22e42ffda4
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=xtensa 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>

All warnings (new ones prefixed by >>):

   In file included from include/linux/device.h:15,
                    from include/linux/node.h:18,
                    from include/linux/cpu.h:17,
                    from include/linux/of_device.h:5,
                    from drivers/pwm/pwm-mtk-disp.c:13:
   drivers/pwm/pwm-mtk-disp.c: In function 'mtk_disp_pwm_enable':
>> drivers/pwm/pwm-mtk-disp.c:108:22: warning: format '%d' expects argument of type 'int', but argument 3 has type 'u64' {aka 'long long unsigned int'} [-Wformat=]
     108 |   dev_err(chip->dev, "clock rate is too high: rate = %d Hz\n",
         |                      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/dev_printk.h:19:22: note: in definition of macro 'dev_fmt'
      19 | #define dev_fmt(fmt) fmt
         |                      ^~~
   drivers/pwm/pwm-mtk-disp.c:108:3: note: in expansion of macro 'dev_err'
     108 |   dev_err(chip->dev, "clock rate is too high: rate = %d Hz\n",
         |   ^~~~~~~
   drivers/pwm/pwm-mtk-disp.c:108:55: note: format string is defined here
     108 |   dev_err(chip->dev, "clock rate is too high: rate = %d Hz\n",
         |                                                      ~^
         |                                                       |
         |                                                       int
         |                                                      %lld


vim +108 drivers/pwm/pwm-mtk-disp.c

    70	
    71	static int mtk_disp_pwm_enable(struct pwm_chip *chip,
    72				       const struct pwm_state *state)
    73	{
    74		struct mtk_disp_pwm *mdp = to_mtk_disp_pwm(chip);
    75		u32 clk_div, period, high_width, value, polarity;
    76		u64 div, rate;
    77		int err;
    78	
    79		/*
    80		 * Find period, high_width and clk_div to suit duty_ns and period_ns.
    81		 * Calculate proper div value to keep period value in the bound.
    82		 *
    83		 * period_ns = 10^9 * (clk_div + 1) * (period + 1) / PWM_CLK_RATE
    84		 * duty_ns = 10^9 * (clk_div + 1) * high_width / PWM_CLK_RATE
    85		 *
    86		 * period = (PWM_CLK_RATE * period_ns) / (10^9 * (clk_div + 1)) - 1
    87		 * high_width = (PWM_CLK_RATE * duty_ns) / (10^9 * (clk_div + 1))
    88		 */
    89		if (!mdp->enabled) {
    90			err = clk_prepare_enable(mdp->clk_main);
    91			if (err < 0) {
    92				dev_err(chip->dev, "Can't enable mdp->clk_main: %d\n",
    93					err);
    94				return err;
    95			}
    96			err = clk_prepare_enable(mdp->clk_mm);
    97			if (err < 0) {
    98				dev_err(chip->dev, "Can't enable mdp->clk_mm: %d\n",
    99					err);
   100				clk_disable_unprepare(mdp->clk_main);
   101				return err;
   102			}
   103		}
   104		rate = clk_get_rate(mdp->clk_main);
   105		clk_div = div_u64(rate * state->period, NSEC_PER_SEC) >>
   106				  PWM_PERIOD_BIT_WIDTH;
   107		if (clk_div > PWM_CLKDIV_MAX) {
 > 108			dev_err(chip->dev, "clock rate is too high: rate = %d Hz\n",
   109				rate);
   110			clk_disable_unprepare(mdp->clk_mm);
   111			clk_disable_unprepare(mdp->clk_main);
   112			return -EINVAL;
   113		}
   114		div = NSEC_PER_SEC * (clk_div + 1);
   115		period = div64_u64(rate * state->period, div);
   116		if (period > 0)
   117			period--;
   118	
   119		high_width = div64_u64(rate * state->duty_cycle, div);
   120		value = period | (high_width << PWM_HIGH_WIDTH_SHIFT);
   121		polarity = 0;
   122		if (state->polarity == PWM_POLARITY_INVERSED)
   123			polarity = PWM_POLARITY;
   124	
   125		mtk_disp_pwm_update_bits(mdp, mdp->data->con0,
   126					 PWM_CLKDIV_MASK,
   127					 clk_div << PWM_CLKDIV_SHIFT);
   128		mtk_disp_pwm_update_bits(mdp, mdp->data->con0,
   129					 PWM_POLARITY, polarity);
   130		mtk_disp_pwm_update_bits(mdp, mdp->data->con1,
   131					 PWM_PERIOD_MASK | PWM_HIGH_WIDTH_MASK,
   132					 value);
   133	
   134		if (mdp->data->has_commit) {
   135			mtk_disp_pwm_update_bits(mdp, mdp->data->commit,
   136						 mdp->data->commit_mask,
   137						 mdp->data->commit_mask);
   138			mtk_disp_pwm_update_bits(mdp, mdp->data->commit,
   139						 mdp->data->commit_mask,
   140						 0x0);
   141		} else {
   142			mtk_disp_pwm_update_bits(mdp, mdp->data->bls_debug,
   143						 mdp->data->bls_debug_mask,
   144						 mdp->data->bls_debug_mask);
   145			mtk_disp_pwm_update_bits(mdp, mdp->data->con0,
   146						 mdp->data->con0_sel,
   147						 mdp->data->con0_sel);
   148		}
   149	
   150		mtk_disp_pwm_update_bits(mdp, DISP_PWM_EN, mdp->data->enable_mask,
   151					 mdp->data->enable_mask);
   152		mdp->enabled = true;
   153		return 0;
   154	}
   155	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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