[PATCH] KVM: arm64: Do not flush memslot if FWB is supported
maz at kernel.org
Fri Sep 18 11:56:57 EDT 2020
On Tue, 15 Sep 2020 18:04:42 +0100, Alexandru Elisei wrote:
> As a result of a KVM_SET_USER_MEMORY_REGION ioctl, KVM flushes the
> dcache for the memslot being changed to ensure a consistent view of memory
> between the host and the guest: the host runs with caches enabled, and
> it is possible for the data written by the hypervisor to still be in the
> caches, but the guest is running with stage 1 disabled, meaning data
> accesses are to Device-nGnRnE memory, bypassing the caches entirely.
Applied to next, thanks!
[1/1] KVM: arm64: Do not flush memslot if FWB is supported
Without deviation from the norm, progress is not possible.
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