[PATCH v3 06/14] dt-bindings: clock: imx8mp: Add hdmi blk_ctl clock IDs

[Aisheng Dong]

> From: Abel Vesa <abel.vesa at nxp.com>
> Sent: Tuesday, September 8, 2020 6:25 PM
> 
> These will be used by the imx8mp for blk_ctl driver.
> 
> Signed-off-by: Abel Vesa <abel.vesa at nxp.com>
> Acked-by: Rob Herring <robh at kernel.org>


Reviewed-by: Dong Aisheng <aisheng.dong at nxp.com>

Regards
Aisheng

> ---
>  include/dt-bindings/clock/imx8mp-clock.h | 40
> ++++++++++++++++++++++++++++++++
>  1 file changed, 40 insertions(+)
> 
> diff --git a/include/dt-bindings/clock/imx8mp-clock.h
> b/include/dt-bindings/clock/imx8mp-clock.h
> index 12632fa..de7d522 100644
> --- a/include/dt-bindings/clock/imx8mp-clock.h
> +++ b/include/dt-bindings/clock/imx8mp-clock.h
> @@ -424,4 +424,44 @@
> 
>  #define IMX8MP_CLK_MEDIA_BLK_CTL_END			25
> 
> +#define IMX8MP_CLK_HDMI_BLK_CTL_GLOBAL_APB_CLK		0
> +#define IMX8MP_CLK_HDMI_BLK_CTL_GLOBAL_B_CLK		1
> +#define IMX8MP_CLK_HDMI_BLK_CTL_GLOBAL_REF266M_CLK	2
> +#define IMX8MP_CLK_HDMI_BLK_CTL_GLOBAL_XTAL24M_CLK	3
> +#define IMX8MP_CLK_HDMI_BLK_CTL_GLOBAL_XTAL32K_CLK	4
> +#define IMX8MP_CLK_HDMI_BLK_CTL_GLOBAL_TX_PIX_CLK	5
> +#define IMX8MP_CLK_HDMI_BLK_CTL_IRQS_STEER_CLK		6
> +#define IMX8MP_CLK_HDMI_BLK_CTL_NOC_HDMI_CLK		7
> +#define IMX8MP_CLK_HDMI_BLK_CTL_NOC_HDCP_CLK		8
> +#define IMX8MP_CLK_HDMI_BLK_CTL_LCDIF_APB_CLK		9
> +#define IMX8MP_CLK_HDMI_BLK_CTL_LCDIF_B_CLK		10
> +#define IMX8MP_CLK_HDMI_BLK_CTL_LCDIF_PDI_CLK		11
> +#define IMX8MP_CLK_HDMI_BLK_CTL_LCDIF_PIX_CLK		12
> +#define IMX8MP_CLK_HDMI_BLK_CTL_LCDIF_SPU_CLK		13
> +#define IMX8MP_CLK_HDMI_BLK_CTL_FDCC_REF_CLK		14
> +#define IMX8MP_CLK_HDMI_BLK_CTL_HRV_MWR_APB_CLK		15
> +#define IMX8MP_CLK_HDMI_BLK_CTL_HRV_MWR_B_CLK		16
> +#define IMX8MP_CLK_HDMI_BLK_CTL_HRV_MWR_CEA_CLK		17
> +#define IMX8MP_CLK_HDMI_BLK_CTL_VSFD_CEA_CLK		18
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_HPI_CLK		19
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_APB_CLK		20
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_CEC_CLK		21
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_ESM_CLK		22
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_GPA_CLK		23
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_PIXEL_CLK		24
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_SFR_CLK		25
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_SKP_CLK		26
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_PREP_CLK		27
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_PHY_APB_CLK		28
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_PHY_INT_CLK		29
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_SEC_MEM_CLK		30
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_TRNG_SKP_CLK		31
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_VID_LINK_PIX_CLK	32
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_TRNG_APB_CLK		33
> +#define IMX8MP_CLK_HDMI_BLK_CTL_HTXPHY_CLK_SEL		34
> +#define IMX8MP_CLK_HDMI_BLK_CTL_LCDIF_CLK_SEL		35
> +#define IMX8MP_CLK_HDMI_BLK_CTL_TX_PIPE_CLK_SEL		36
> +
> +#define IMX8MP_CLK_HDMI_BLK_CTL_END			37
> +
>  #endif
> --
> 2.7.4