[PATCH 1/2] dt-bindings: usb: dwc3-xilinx: Add documentation for Versal DWC3 Controller
Manish Narani
MNARANI at xilinx.com
Wed Sep 9 11:46:13 EDT 2020
Hi Rob,
Thanks for the review.
> -----Original Message-----
> From: Rob Herring <robh at kernel.org>
> Sent: Wednesday, September 9, 2020 4:35 AM
> To: Manish Narani <MNARANI at xilinx.com>
> Cc: gregkh at linuxfoundation.org; Michal Simek <michals at xilinx.com>;
> balbi at kernel.org; p.zabel at pengutronix.de; linux-usb at vger.kernel.org;
> devicetree at vger.kernel.org; linux-arm-kernel at lists.infradead.org; linux-
> kernel at vger.kernel.org; git <git at xilinx.com>
> Subject: Re: [PATCH 1/2] dt-bindings: usb: dwc3-xilinx: Add documentation for
> Versal DWC3 Controller
>
> On Thu, Aug 27, 2020 at 12:14:00AM +0530, Manish Narani wrote:
> > Add documentation for Versal DWC3 controller. Add required property
> > 'reg' for the same. Also add optional properties for snps,dwc3.
> >
> > Signed-off-by: Manish Narani <manish.narani at xilinx.com>
> > ---
> > .../devicetree/bindings/usb/dwc3-xilinx.txt | 12 +++++++++++-
> > 1 file changed, 11 insertions(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.txt
> b/Documentation/devicetree/bindings/usb/dwc3-xilinx.txt
> > index 4aae5b2cef56..dd41ed831411 100644
> > --- a/Documentation/devicetree/bindings/usb/dwc3-xilinx.txt
> > +++ b/Documentation/devicetree/bindings/usb/dwc3-xilinx.txt
> > @@ -1,7 +1,8 @@
> > Xilinx SuperSpeed DWC3 USB SoC controller
> >
> > Required properties:
> > -- compatible: Should contain "xlnx,zynqmp-dwc3"
> > +- compatible: May contain "xlnx,zynqmp-dwc3" or "xlnx,versal-
> dwc3"
> > +- reg: Base address and length of the register control block
> > - clocks: A list of phandles for the clocks listed in clock-names
> > - clock-names: Should contain the following:
> > "bus_clk" Master/Core clock, have to be >= 125 MHz for SS
> > @@ -13,12 +14,19 @@ Required child node:
> > A child node must exist to represent the core DWC3 IP block. The name of
> > the node is not important. The content of the node is defined in dwc3.txt.
> >
> > +Optional properties for snps,dwc3:
> > +- dma-coherent: Enable this flag if CCI is enabled in design. Adding this
> > + flag configures Global SoC bus Configuration Register and
> > + Xilinx USB 3.0 IP - USB coherency register to enable CCI.
> > +- interrupt-names: This property provides the names of the interrupt ids
> used
>
> You have to define what the names are. 'dwc_usb3' seems pretty pointless
> if only 1 name.
OK. I am planning to add more interrupt ids going ahead. For now I will remove
this interrupt name in v2. The interrupt name will be added along with other interrupt
names.
Thanks,
Manish
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