[PATCH v2 1/3] ARM: dts: exynos: Add assigned clock parent to CMU in Exynos3250
Krzysztof Kozlowski
krzk at kernel.org
Sun Sep 6 08:44:07 EDT 2020
On Fri, Sep 04, 2020 at 08:47:10AM +0200, Marek Szyprowski wrote:
> Hi Krzysztof,
>
> On 03.09.2020 20:14, Krzysztof Kozlowski wrote:
> > Commit 52005dece527 ("ARM: dts: Add assigned clock parents to CMU node
> > for exynos3250") added assigned clocks under Clock Management Unit to
> > fix hangs when accessing ISP registers.
> >
> > However the dtschema expects "clocks" property if "assigned-clocks" are
> > used. Add reference to input clock, the parent used in
> > "assigned-clock-parents" to silence the dtschema warnings:
> >
> > arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml: clock-controller at 10030000: 'clocks' is a dependency of 'assigned-clocks'
> >
> > Signed-off-by: Krzysztof Kozlowski <krzk at kernel.org>
> >
> > ---
> >
> > Changes since v1:
> > 1. Add clocks property.
> >
> > This is a v2 for:
> > https://lore.kernel.org/linux-samsung-soc/20200901101534.GE23793@kozik-lap/T/#me85ac382b847dadbc3f6ebf30e94e70b5df1ebb6
> > ---
> > arch/arm/boot/dts/exynos3250.dtsi | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
> > index a1e93fb7f694..89b160280469 100644
> > --- a/arch/arm/boot/dts/exynos3250.dtsi
> > +++ b/arch/arm/boot/dts/exynos3250.dtsi
> > @@ -214,6 +214,7 @@
> > compatible = "samsung,exynos3250-cmu";
> > reg = <0x10030000 0x20000>;
> > #clock-cells = <1>;
> > + clocks = <&cmu CLK_FIN_PLL>;
>
> This is not a correct input clock for this CMU. Please assign it to
> xusbxti, xxti or xtcxo in the respective board dts, as this is a board
> property.
Makes sense, although all this is kind of a hack as neither the bindings
nor the driver take the input clock.
Best regards,
Krzysztof
>
> > assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>,
> > <&cmu CLK_MOUT_ACLK_266_SUB>;
> > assigned-clock-parents = <&cmu CLK_FIN_PLL>,
>
> Best regards
> --
> Marek Szyprowski, PhD
> Samsung R&D Institute Poland
>
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