[PATCH 1/2] ARM: davinci: da850: Add SPI1 pinmux definitions

Esben Haabendal esben at geanix.com
Tue Sep 1 09:15:46 EDT 2020


Extend the MUX configuration to allow enabling SPI1 pin functions.

Signed-off-by: Esben Haabendal <esben at geanix.com>
---
 arch/arm/mach-davinci/da850.c            | 13 +++++++++++++
 arch/arm/mach-davinci/include/mach/mux.h | 14 ++++++++++++++
 2 files changed, 27 insertions(+)

diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 68156e7239a6..d07ea5dbab65 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -157,6 +157,19 @@ static const struct mux_config da850_pins[] = {
 	MUX_CFG(DA850, MMCSD1_DAT_3,	19,	8,	15,	2,	false)
 	MUX_CFG(DA850, MMCSD1_CLK,	18,	12,	15,	2,	false)
 	MUX_CFG(DA850, MMCSD1_CMD,	18,	16,	15,	2,	false)
+	/* SPI1 function */
+	MUX_CFG(DA850, SPI1_SIMO,	5,	20,	15,	1,	false)
+	MUX_CFG(DA850, SPI1_SOMI,	5,	16,	15,	1,	false)
+	MUX_CFG(DA850, SPI1_ENA,	5,	12,	15,	1,	false)
+	MUX_CFG(DA850, SPI1_CLK,	5,	8,	15,	1,	false)
+	MUX_CFG(DA850, SPI1_SCS0,	5,	4,	15,	1,	false)
+	MUX_CFG(DA850, SPI1_SCS1,	5,	0,	15,	1,	false)
+	MUX_CFG(DA850, SPI1_SCS2,	4,	28,	15,	1,	false)
+	MUX_CFG(DA850, SPI1_SCS3,	4,	24,	15,	1,	false)
+	MUX_CFG(DA850, SPI1_SCS4,	4,	20,	15,	1,	false)
+	MUX_CFG(DA850, SPI1_SCS5,	4,	16,	15,	1,	false)
+	MUX_CFG(DA850, SPI1_SCS6,	4,	12,	15,	1,	false)
+	MUX_CFG(DA850, SPI1_SCS7,	4,	8,	15,	1,	false)
 	/* EMIF2.5/EMIFA function */
 	MUX_CFG(DA850, EMA_D_7,		9,	0,	15,	1,	false)
 	MUX_CFG(DA850, EMA_D_6,		9,	4,	15,	1,	false)
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index 631655e68ae0..2340ca92110d 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -865,6 +865,20 @@ enum davinci_da850_index {
 	DA850_MMCSD1_CLK,
 	DA850_MMCSD1_CMD,
 
+	/* SPI1 function */
+	DA850_SPI1_SIMO,
+	DA850_SPI1_SOMI,
+	DA850_SPI1_ENA,
+	DA850_SPI1_CLK,
+	DA850_SPI1_SCS0,
+	DA850_SPI1_SCS1,
+	DA850_SPI1_SCS2,
+	DA850_SPI1_SCS3,
+	DA850_SPI1_SCS4,
+	DA850_SPI1_SCS5,
+	DA850_SPI1_SCS6,
+	DA850_SPI1_SCS7,
+
 	/* EMIF2.5/EMIFA function */
 	DA850_EMA_D_7,
 	DA850_EMA_D_6,
-- 
2.28.0




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