[PATCH v3 9/9] perf mem: Document event type 'ldst'

Leo Yan leo.yan at linaro.org
Thu Oct 29 21:49:23 EDT 2020


Hi Ian,

On Thu, Oct 29, 2020 at 06:10:40PM -0700, Ian Rogers wrote:
> On Tue, Oct 27, 2020 at 11:39 PM Leo Yan <leo.yan at linaro.org> wrote:
> >
> > The event type 'ldst' is added for recording both load and store memory
> > operations, this patch documents for the new event type.
> >
> > Signed-off-by: Leo Yan <leo.yan at linaro.org>
> > ---
> >  tools/perf/Documentation/perf-mem.txt | 6 +++++-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/tools/perf/Documentation/perf-mem.txt b/tools/perf/Documentation/perf-mem.txt
> > index 199ea0f0a6c0..c50ef37dba72 100644
> > --- a/tools/perf/Documentation/perf-mem.txt
> > +++ b/tools/perf/Documentation/perf-mem.txt
> > @@ -38,7 +38,11 @@ OPTIONS
> >
> >  -t::
> >  --type=<type>::
> > -       Select the memory operation type: load or store (default: load,store)
> > +       Select the memory operation type: load, store, ldst (default: load,store).
> > +       The type 'ldst' means the single event can record both for load and store
> > +       operations; Intel and PowerPC support the types 'load' and 'store' but
> > +       'ldst' cannot be used; on Arm64, it uses Arm SPE as memory events and
> > +       user needs to specify one of these three types.
> 
> Naive question, could the type remain load,store for mem record and
> the tool internally change it to ldst for ARM SPE?

Good point.  I understand you are suggesting to avoid complex options
for usage, looked again at the code, my conclusion is it's feabile to
convert 'load,store' to Arm SPE's ldst type.

If find any block issue when I experiment this idea, will come back to
update it; otherwise, I will apply the suggestion in next spin.

Thanks for suggestion,
Leo



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