[PATCH 0/8] Add R5F nodes on TI K3 AM65x and J721E SoCs

Suman Anna s-anna at ti.com
Wed Oct 28 23:37:54 EDT 2020


Hi Nishanth,

The TI K3 R5F remoteproc driver and bindings were merged into 5.10-rc1,
and this series adds the follow-on base dt nodes for the R5F remote
processors on TI K3 AM65x and J721E SoCs. Additional memory nodes were
also added to boot these processors successfully on applicable TI K3
AM65x and J721E EVM boards. The series uses previously accepted mailbox
nodes.

The patches follow slightly different convention between AM65x and
J721E. The reserved-memory nodes are added directly in the relevant
board dts file for AM65x boards, while they are added in the common
k3-j721e-som-p0.dtsi file for J721E SoCs following the similar addition
of K3 C66x and C71x DSP nodes in 5.10-rc1.

Patches apply on top of your 5.10-rc1 based staging branch.

I have validated the IPC functionality using System Firmware v2020.04a
and corresponding IPC example firmwares. 

regards
Suman

Suman Anna (8):
  arm64: dts: ti: k3-am65-mcu: Add MCU domain R5F cluster node
  arm64: dts: ti: k3-am654-base-board: Add mailboxes to R5Fs
  arm64: dts: ti: k3-am654-base-board: Add DDR carveout memory nodes for
    R5Fs
  arm64: dts: ti: k3-am654-base-board: Reserve memory for IPC between
    R5F cores
  arm64: dts: ti: k3-j721e-mcu: Add MCU domain R5F cluster node
  arm64: dts: ti: k3-j721e-main: Add MAIN domain R5F cluster nodes
  arm64: dts: ti: k3-j721e-som-p0: Add mailboxes to R5Fs
  arm64: dts: ti: k3-j721e-som-p0: Add DDR carveout memory nodes for
    R5Fs

 arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi       |  42 ++++++-
 .../arm64/boot/dts/ti/k3-am654-base-board.dts |  45 ++++++-
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi     |  82 ++++++++++++-
 .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi      |  42 ++++++-
 arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi   | 110 +++++++++++++++++-
 5 files changed, 316 insertions(+), 5 deletions(-)

-- 
2.28.0




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