[PATCH v4 01/34] dt-bindings: ARM: Mediatek: Add new document bindings of camsys raw controller

Weiyi Lu weiyi.lu at mediatek.com
Thu Oct 22 08:36:54 EDT 2020


This patch adds the new binding documentation of camsys raw controller
for Mediatek MT8192.

Signed-off-by: Weiyi Lu <weiyi.lu at mediatek.com>
---
 .../bindings/arm/mediatek/mediatek,camsys-raw.yaml | 54 ++++++++++++++++++++++
 1 file changed, 54 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml
new file mode 100644
index 0000000..eb395ff
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml
@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,camsys-raw.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek CAMSYS RAW Controller
+
+maintainers:
+  - Weiyi Lu <weiyi.lu at mediatek.com>
+
+description:
+  The Mediatek camsys raw controller provides functional configurations and clocks to the system.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - mediatek,mt8192-camsys_rawa
+          - mediatek,mt8192-camsys_rawb
+          - mediatek,mt8192-camsys_rawc
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+  '#clock-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+
+examples:
+  - |
+    camsys_rawa: syscon at 1a04f000 {
+        compatible = "mediatek,mt8192-camsys_rawa", "syscon";
+        reg = <0 0x1a04f000 0 0x1000>;
+        #clock-cells = <1>;
+    };
+
+  - |
+    camsys_rawb: syscon at 1a06f000 {
+        compatible = "mediatek,mt8192-camsys_rawb", "syscon";
+        reg = <0 0x1a06f000 0 0x1000>;
+        #clock-cells = <1>;
+    };
+
+  - |
+    camsys_rawc: syscon at 1a08f000 {
+        compatible = "mediatek,mt8192-camsys_rawc", "syscon";
+        reg = <0 0x1a08f000 0 0x1000>;
+        #clock-cells = <1>;
+    };
-- 
1.8.1.1.dirty


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