[PATCH v19 4/5] dt-bindings: remoteproc: Add documentation for ZynqMP R5 rproc bindings
Ben Levinsky
ben.levinsky at xilinx.com
Mon Oct 19 18:40:06 EDT 2020
Add binding for ZynqMP R5 OpenAMP.
Represent the RPU domain resources in one device node. Each RPU
processor is a subnode of the top RPU domain node.
Signed-off-by: Jason Wu <j.wu at xilinx.com>
Signed-off-by: Wendy Liang <jliang at xilinx.com>
Signed-off-by: Michal Simek <michal.simek at xilinx.com>
Signed-off-by: Ben Levinsky <ben.levinsky at xilinx.com>
---
v3:
- update zynqmp_r5 yaml parsing to not raise warnings for extra
information in children of R5 node. The warning "node has a unit
name, but no reg or ranges property" will still be raised though
as this particular node is needed to describe the
'#address-cells' and '#size-cells' information.
v4::
- remove warning '/example-0/rpu at ff9a0000/r5 at 0:
node has a unit name, but no reg or ranges property'
by adding reg to r5 node.
v5:
- update device tree sample and yaml parsing to not raise any warnings
- description for memory-region in yaml parsing
- compatible string in yaml parsing for TCM
v6:
- remove coupling TCM nodes with remoteproc
- remove mailbox as it is optional not needed
v7:
- change lockstep-mode to xlnx,cluster-mode
v9:
- show example IPC nodes and tcm bank nodes
v11:
- add property meta-memory-regions to illustrate link
between r5 and TCM banks
- update so no warnings from 'make dt_binding_check'
v14:
- concerns were raised about the new property meta-memory-regions.
There is no clear direction so for the moment I kept it in the series
- place IPC nodes in RAM in the reserved memory section
v15:
- change lockstep-mode prop as follows: if present, then RPU cluster is in
lockstep mode. if not present, cluster is in split mode.
v17:
- remove compatible string from tcm bank nodes
- fix style for bindings
- add boolean type to lockstep mode in binding
- add/update descriptions memory-region, meta-memory-regions,
pnode-id, mbox* properties
v18:
- update example remoteproc zynqmp r5 compat string, remove version
number
- change property from memory-region to memory-regions
---
.../xilinx,zynqmp-r5-remoteproc.yaml | 142 ++++++++++++++++++
1 file changed, 142 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/xilinx,zynqmp-r5-remoteproc.yaml
diff --git a/Documentation/devicetree/bindings/remoteproc/xilinx,zynqmp-r5-remoteproc.yaml b/Documentation/devicetree/bindings/remoteproc/xilinx,zynqmp-r5-remoteproc.yaml
new file mode 100644
index 000000000000..c202dca3b6d0
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/xilinx,zynqmp-r5-remoteproc.yaml
@@ -0,0 +1,142 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/remoteproc/xilinx,zynqmp-r5-remoteproc.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Xilinx R5 remote processor controller bindings
+
+description:
+ This document defines the binding for the remoteproc component that loads and
+ boots firmwares on the Xilinx Zynqmp and Versal family chipset.
+
+ Note that the Linux has global addressing view of the R5-related memory (TCM)
+ so the absolute address ranges are provided in TCM reg's.
+
+maintainers:
+ - Ed Mooring <ed.mooring at xilinx.com>
+ - Ben Levinsky <ben.levinsky at xilinx.com>
+
+properties:
+ compatible:
+ const: xlnx,zynqmp-r5-remoteproc
+
+ lockstep-mode:
+ description:
+ If this property is present, then the configuration is lock-step.
+ Otherwise RPU is split.
+ type: boolean
+ maxItems: 1
+
+ interrupts:
+ description:
+ Interrupt mapping for remoteproc IPI. It is required if the
+ user uses the remoteproc driver with the RPMsg kernel driver.
+ maxItems: 6
+
+ memory-regions:
+ description:
+ collection of memory carveouts used for elf-loading and inter-processor
+ communication. each carveout in this case should be in DDR, not
+ chip-specific memory. In Xilinx case, this is TCM, OCM, BRAM, etc.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+
+ meta-memory-regions:
+ description:
+ collection of memories that are not present in the top level memory
+ nodes' mapping. For example, R5s' TCM banks. These banks are needed
+ for R5 firmware meta data such as the R5 firmware's heap and stack.
+ To be more precise, this is on-chip reserved SRAM regions, e.g. TCM,
+ BRAM, OCM, etc.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+
+ pnode-id:
+ maxItems: 1
+ description:
+ power node id that is used to uniquely identify the node for Xilinx
+ Power Management. The value is then passed to Xilinx platform
+ manager for power on/off and access.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ mboxes:
+ description:
+ array of phandles that describe the rx and tx for xilinx zynqmp
+ mailbox driver. order of rx and tx is described by the mbox-names
+ property. This will be used for communication with remote
+ processor.
+ maxItems: 2
+
+ mbox-names:
+ description:
+ array of strings that denote which item in the mboxes property array
+ are the rx and tx for xilinx zynqmp mailbox driver
+ maxItems: 2
+ $ref: /schemas/types.yaml#/definitions/string-array
+
+
+examples:
+ - |
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ elf_load: rproc at 3ed000000 {
+ no-map;
+ reg = <0x3ed00000 0x40000>;
+ };
+
+ rpu0vdev0vring0: rpu0vdev0vring0 at 3ed40000 {
+ no-map;
+ reg = <0x3ed40000 0x4000>;
+ };
+ rpu0vdev0vring1: rpu0vdev0vring1 at 3ed44000 {
+ no-map;
+ reg = <0x3ed44000 0x4000>;
+ };
+ rpu0vdev0buffer: rpu0vdev0buffer at 3ed48000 {
+ no-map;
+ reg = <0x3ed48000 0x100000>;
+ };
+
+ };
+
+ /*
+ * Below nodes are required if using TCM to load R5 firmware
+ * if not, then either do not provide nodes are label as disabled in
+ * status property
+ */
+ tcm0a: tcm_0a at ffe00000 {
+ reg = <0xffe00000 0x10000>;
+ pnode-id = <0xf>;
+ no-map;
+ status = "okay";
+ phandle = <0x40>;
+ };
+ tcm0b: tcm_1a at ffe20000 {
+ reg = <0xffe20000 0x10000>;
+ pnode-id = <0x10>;
+ no-map;
+ status = "okay";
+ phandle = <0x41>;
+ };
+
+ rpu {
+ compatible = "xlnx,zynqmp-r5-remoteproc";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ lockstep-mode;
+ r5_0 {
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ memory-regions = <&elf_load>,
+ <&rpu0vdev0vring0>,
+ <&rpu0vdev0vring1>,
+ <&rpu0vdev0buffer>;
+ meta-memory-regions = <&tcm_0a>, <&tcm_0b>;
+ pnode-id = <0x7>;
+ };
+ };
+
+...
--
2.17.1
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