[PATCH V3] perf/imx_ddr: Add stop event counters support for i.MX8MP

[Will Deacon]

On Tue, 27 Oct 2020 18:44:51 +0800, Joakim Zhang wrote:
> DDR Perf driver only supports free-running event counters(counter1/2/3)
> now, this patch adds support for stop event counters.
> 
> Legacy SoCs:
> Cycle counter(counter0) is a special counter, only count cycles. When
> cycle counter overflow, it will lock all counters and generate an
> interrupt. In ddr_perf_irq_handler, disable cycle counter then all
> counters would stop at the same time, update all counters' count, then
> enable cycle counter that all counters count again. During this process,
> only clear cycle counter, no need to clear event counters since they are
> free-running counters. They would continue counting after overflow and
> do/while loop from ddr_perf_event_update can handle event counters
> overflow case.
> 
> [...]

Applied to will (for-next/perf), thanks!

[1/1] perf/imx_ddr: Add stop event counters support for i.MX8MP
      https://git.kernel.org/will/c/6b46338f2210

Cheers,
-- 
Will

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