[PATCH 2/6] arm64: Allow mismatched 32-bit EL0 support

Qais Yousef qais.yousef at arm.com
Thu Nov 12 12:36:45 EST 2020


On 11/12/20 17:06, Marc Zyngier wrote:
> On 2020-11-12 16:49, Qais Yousef wrote:
> > On 11/12/20 11:55, Qais Yousef wrote:
> > > On 11/12/20 10:24, Will Deacon wrote:
> > > > On Wed, Nov 11, 2020 at 04:27:00PM +0000, Qais Yousef wrote:
> > > > > On 11/09/20 13:52, Will Deacon wrote:
> > > > > > On Fri, Nov 06, 2020 at 02:48:35PM +0000, Qais Yousef wrote:
> > > > > > > On 11/06/20 13:00, Will Deacon wrote:
> > > > > > > > On Fri, Nov 06, 2020 at 12:54:25PM +0000, Qais Yousef wrote:
> > > > > > > > > FWIW I have my v3 over here in case it's of any help. It solves the problem of
> > > > > > > > > HWCAP discovery when late AArch32 CPU is booted by populating boot_cpu_date
> > > > > > > > > with 32bit features then.
> > > > > > > > >
> > > > > > > > > 	git clone https://git.gitlab.arm.com/linux-arm/linux-qy.git -b asym-aarch32-upstream-v3 origin/asym-aarch32-upstream-v3
> > > > > > > >
> > > > > > > > Cheers, I've done something similar. I was hoping to post it today, but I've
> > > > > > > > been side-tracked with bug fixing this morning. The main headache I ended up
> > > > > > > > with was allowing late-onlining of 64-bit-only CPUs if all the boot CPUs
> > > > > > > > are 32-bit capable. What do you do in that case?
> > > > > > >
> > > > > > > Do you mean if CPUs 0-3 were 32bit capable and we boot with maxcpus=4 then
> > > > > > > attempt to bring the remaining 64bit-only cpus online later?
> > > > > >
> > > > > > Right. I think we will refuse to online them. I'll post my attempt at
> > > > > > handling that shortly.
> > > > >
> > > > > Sorry for the delayed response.
> > > > >
> > > > > You're right, I tried that and they refuse to come online. We missed that tbh.
> > > > >
> > > > > Haven't thought what we should do yet. I tried your v2 and it failed similarly.
> > > >
> > > > Hmm, it shouldn't do. Please could you provide the log? My hunch is that you
> > > > are blatting 32-bit EL1 support as well, and we can't handle a mismatch for
> > > > that with a late CPU. Do you know if the CPUs being integrated into these
> > > > broken designs have a mismatch at EL1 as well?
> > > 
> > > Hmm my test could have been invalid then. We shouldn't have mismatch
> > > at EL1,
> > > for ease of testing I used a hacked up patch to fake asymmetry on
> > > Juno. Testing
> > > on FVP now, it takes time to boot up though..
> > > 
> > > Let me re-run this and get you the log from proper environment.
> > > Assuming it
> > > still fails.
> > 
> > Still fails the same on FVP. dmesg attached. There's a splat shortly
> > after
> > attempting to online CPU 4.
> > 
> > 	# cat /sys/devices/system/cpu/online
> > 	0-3
> > 	# cat /sys/devices/system/cpu/aarch32_el0
> > 	0-3
> > 
> > Now while writing this I just realized I tell the FVP to disable aarch32
> > support at EL0. So this might still make the kernel thinks there's
> > AArch32
> > support at EL1 - which seems is what makes your series get confused?
> 
> You can't have AArch32 at EL1 and not have it at EL0.
> 
> > Anyway. No real hardware to test on and not sure if I can tell the FVP
> > to
> > disable AArch32 support at EL1.
> > 
> > /me goes and dig
> 
>         -C cluster0.max_32bit_el=-1     # no 32bit support whatsoever
>         -C cluster1.max_32bit_el=0      # 32bit support at EL0 only

Ah okay. That's the option I use. I must have misinterpreted Will's words then
'blatting 32-bit EL1'. Blame my English :-)

Thanks

--
Qais Yousef



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