[PATCHv2] bus: ti-sysc: Fix bogus resetdone warning on enable for cpsw

[Grygorii Strashko]

On 10/11/2020 11:21, Tony Lindgren wrote:
> Bail out early from sysc_wait_softreset() just like we do in sysc_reset()
> if there's no sysstatus srst_shift to fix a bogus resetdone warning on
> enable as suggested by Grygorii Strashko <grygorii.strashko at ti.com>.
> 
> We do not currently handle resets for modules that need writing to the
> sysstatus register. If we at some point add that, we also need to add
> SYSS_QUIRK_RESETDONE_INVERTED flag for cpsw as the sysstatus bit is low
> when reset is done as described in the am335x TRM "Table 14-202
> SOFT_RESET Register Field Descriptions"
> 
> Fixes: d46f9fbec719 ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit")
> Suggested-by: Grygorii Strashko <grygorii.strashko at ti.com>
> Signed-off-by: Tony Lindgren <tony at atomide.com>
> ---

Acked-by: Grygorii Strashko <grygorii.strashko at ti.com>

> 
> Changes since v1:
> - Drop quirk handling and use fix suggested by Grygorii
> 
> ---
>   drivers/bus/ti-sysc.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
> --- a/drivers/bus/ti-sysc.c
> +++ b/drivers/bus/ti-sysc.c
> @@ -227,6 +227,9 @@ static int sysc_wait_softreset(struct sysc *ddata)
>   	u32 sysc_mask, syss_done, rstval;
>   	int syss_offset, error = 0;
>   
> +	if (ddata->cap->regbits->srst_shift < 0)
> +		return 0;
> +
>   	syss_offset = ddata->offsets[SYSC_SYSSTATUS];
>   	sysc_mask = BIT(ddata->cap->regbits->srst_shift);
>   
> 

-- 
Best regards,
grygorii