[PATCH v3 1/3] arm64: ptrauth: add pointer authentication Armv8.6 enhanced feature
Amit Daniel Kachhap
amit.kachhap at arm.com
Wed Jun 24 03:07:53 EDT 2020
On 6/23/20 8:15 PM, Dave Martin wrote:
> On Tue, Jun 23, 2020 at 06:46:28PM +0530, Amit Daniel Kachhap wrote:
>> Hi,
>>
>> On 6/22/20 7:52 PM, Dave Martin wrote:
>>> On Thu, Jun 18, 2020 at 10:40:27AM +0530, Amit Daniel Kachhap wrote:
>>>> This patch add changes for Pointer Authentication enhanced features
>>>> mandatory for Armv8.6. These features are,
>>>>
>>>> +
>>>> asmlinkage void notrace el0_sync_handler(struct pt_regs *regs)
>>>> {
>>>> unsigned long esr = read_sysreg(esr_el1);
>>>> @@ -272,6 +290,9 @@ asmlinkage void notrace el0_sync_handler(struct pt_regs *regs)
>>>> case ESR_ELx_EC_BRK64:
>>>> el0_dbg(regs, esr);
>>>> break;
>>>> + case ESR_ELx_EC_FPAC:
>>>> + el0_fpac(regs, esr);
>>>> + break;
>>>> default:
>>>> el0_inv(regs, esr);
>>>> }
>>>> @@ -335,6 +356,9 @@ asmlinkage void notrace el0_sync_compat_handler(struct pt_regs *regs)
>>>> case ESR_ELx_EC_BKPT32:
>>>> el0_dbg(regs, esr);
>>>> break;
>>>> + case ESR_ELx_EC_FPAC:
>>>> + el0_fpac(regs, esr);
>>>> + break;
>>>
>>> Can this exception ever happen? I thought ptrauth doesn't exist for
>>> AArch32.
>>
>> This path will be taken during FPAC fault from userspace(EL0). Am I missing
>> something here?
>
> I thought AArch32 doesn't have pointer auth at all, due to a lack of
> spare address bits.
>
> el0_sync_compat_handler() is presumably only for exceptions coming from
> AArch32?
ok got it. I will remove el0_fpac from here. Thanks for pointing this issue.
>>
>>>
>>>> default:
>>>> el0_inv(regs, esr);
>>>> }
>
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