[PATCH v3 3/3] arm64: Add workaround for Arm Cortex-A77 erratum 1508412

[Will Deacon]

On Wed, Jul 29, 2020 at 05:38:00PM +0100, Catalin Marinas wrote:
> On Fri, Jul 17, 2020 at 02:52:33PM -0600, Rob Herring wrote:
> > diff --git a/arch/arm64/include/asm/kvm_hyp.h b/arch/arm64/include/asm/kvm_hyp.h
> > index ce3080834bfa..ce5b0d9b12bf 100644
> > --- a/arch/arm64/include/asm/kvm_hyp.h
> > +++ b/arch/arm64/include/asm/kvm_hyp.h
> > @@ -46,6 +46,17 @@
> >  #define read_sysreg_el2(r)	read_sysreg_elx(r, _EL2, _EL1)
> >  #define write_sysreg_el2(v,r)	write_sysreg_elx(v, r, _EL2, _EL1)
> >  
> > +static inline u64 __hyp_text read_sysreg_par(void)
> > +{
> > +	u64 par;
> > +	if (cpus_have_const_cap(ARM64_WORKAROUND_1508412))
> > +		dmb(sy);
> > +	par = read_sysreg(par_el1);
> > +	if (cpus_have_const_cap(ARM64_WORKAROUND_1508412))
> > +		dmb(sy);
> > +	return par;
> > +}
> 
> Even if that's not always called on a critical path, I agree with Andrew
> that we could use alternatives here for dmb(sy).

Even then, I'm not sure how this helps if the CPU can speculatively branch
to the PAR access without executing the DMB. Is that not possible on A77?

Will