[PATCH v2 3/3] ARM: dts: stm32: add initial support for stm32mp157-odyssey board
Ahmad Fatoum
a.fatoum at pengutronix.de
Tue Jul 21 11:48:43 EDT 2020
Hello Marcin,
On 7/21/20 5:20 PM, Marcin Sloniewski wrote:
> Add support for Seeed Studio's stm32mp157c odyssey board.
> Board consists of SoM with stm32mp157c with 4GB eMMC and 512 MB DDR3 RAM
> and carrier board with USB and ETH interfaces, SD card connector,
> wifi and BT chip AP6236.
>
> In this patch only basic kernel boot is supported and interfacing
> SD card and on-board eMMC.
>
> Signed-off-by: Marcin Sloniewski <marcin.sloniewski at gmail.com>
> ---
>
> Changes in v2:
> - add new odyssey dts to Makefile
>
> arch/arm/boot/dts/Makefile | 3 +-
> .../arm/boot/dts/stm32mp157c-odyssey-som.dtsi | 276 ++++++++++++++++++
> arch/arm/boot/dts/stm32mp157c-odyssey.dts | 72 +++++
> 3 files changed, 350 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi
> create mode 100644 arch/arm/boot/dts/stm32mp157c-odyssey.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index e6a1cac0bfc7..a3ea2301c82c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1047,7 +1047,8 @@ dtb-$(CONFIG_ARCH_STM32) += \
> stm32mp157c-dk2.dtb \
> stm32mp157c-ed1.dtb \
> stm32mp157c-ev1.dtb \
> - stm32mp157c-lxa-mc1.dtb
> + stm32mp157c-lxa-mc1.dtb \
> + stm32mp157c-odyssey.dtb
> dtb-$(CONFIG_MACH_SUN4I) += \
> sun4i-a10-a1000.dtb \
> sun4i-a10-ba10-tvbox.dtb \
> diff --git a/arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi
> new file mode 100644
> index 000000000000..620ff9e7f370
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi
> @@ -0,0 +1,276 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> +/*
> + * Copyright (C) 2020 Marcin Sloniewski <marcin.sloniewski at gmail.com>.
> + */
> +
> +/dts-v1/;
> +
> +#include "stm32mp157.dtsi"
> +#include "stm32mp15xc.dtsi"
> +#include "stm32mp15-pinctrl.dtsi"
> +#include "stm32mp15xxac-pinctrl.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/mfd/st,stpmic1.h>
> +
> +/ {
> + model = "Seeed Studio Odyssey-STM32MP157C SOM";
> + compatible = "seeed,stm32mp157c-odyssey-som", "st,stm32mp157";
> +
> + memory at c0000000 {
> + reg = <0xc0000000 0x20000000>;
> + };
device_type = "memory"; is mandatory here per spec. There is no longer a skeleton.dtsi
that adds this for you.
> +
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + mcuram2: mcuram2 at 10000000 {
> + compatible = "shared-dma-pool";
> + reg = <0x10000000 0x40000>;
> + no-map;
> + };
> +
> + vdev0vring0: vdev0vring0 at 10040000 {
> + compatible = "shared-dma-pool";
> + reg = <0x10040000 0x1000>;
> + no-map;
> + };
> +
> + vdev0vring1: vdev0vring1 at 10041000 {
> + compatible = "shared-dma-pool";
> + reg = <0x10041000 0x1000>;
> + no-map;
> + };
> +
> + vdev0buffer: vdev0buffer at 10042000 {
> + compatible = "shared-dma-pool";
> + reg = <0x10042000 0x4000>;
> + no-map;
> + };
> +
> + mcuram: mcuram at 30000000 {
> + compatible = "shared-dma-pool";
> + reg = <0x30000000 0x40000>;
> + no-map;
> + };
> +
> + retram: retram at 38000000 {
> + compatible = "shared-dma-pool";
> + reg = <0x38000000 0x10000>;
> + no-map;
> + };
> +
> + gpu_reserved: gpu at d4000000 {
> + reg = <0xd4000000 0x4000000>;
> + no-map;
> + };
> + };
> +
> + led {
> + compatible = "gpio-leds";
> + blue {
This is not aligned with the leds-gpio.yaml binding. You could change it to led-blue.
Run dtbs_check to find maybe more such issues.
> + label = "heartbeat";
Per binding this is deprecated. Function/color should be used instead.
> + gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + default-state = "off";
Does it make sense to have a trigger but still default-state = "off"?
> + };
> + };
> +};
> +
> +&gpu {
> + contiguous-area = <&gpu_reserved>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c2_pins_a>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /* spare dmas for other usage */
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +
> + pmic: stpmic at 33 {
> + compatible = "st,stpmic1";
> + reg = <0x33>;
> + interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + status = "okay";
status = "okay" is implied already here.
> +
> + regulators {
> + compatible = "st,stpmic1-regulators";
> + ldo1-supply = <&v3v3>;
> + ldo3-supply = <&vdd_ddr>;
> + ldo6-supply = <&v3v3>;
> + pwr_sw1-supply = <&bst_out>;
> + pwr_sw2-supply = <&bst_out>;
> +
> + vddcore: buck1 {
> + regulator-name = "vddcore";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-always-on;
> + regulator-initial-mode = <0>;
> + regulator-over-current-protection;
> + };
> +
> + vdd_ddr: buck2 {
> + regulator-name = "vdd_ddr";
> + regulator-min-microvolt = <1350000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-always-on;
> + regulator-initial-mode = <0>;
> + regulator-over-current-protection;
> + };
> +
> + vdd: buck3 {
> + regulator-name = "vdd";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + st,mask-reset;
> + regulator-initial-mode = <0>;
> + regulator-over-current-protection;
> + };
> +
> + v3v3: buck4 {
> + regulator-name = "v3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-over-current-protection;
> + regulator-initial-mode = <0>;
> + };
> +
> + v1v8_audio: ldo1 {
> + regulator-name = "v1v8_audio";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + interrupts = <IT_CURLIM_LDO1 0>;
> + };
> +
> + v3v3_hdmi: ldo2 {
> + regulator-name = "v3v3_hdmi";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + interrupts = <IT_CURLIM_LDO2 0>;
> + };
> +
> + vtt_ddr: ldo3 {
> + regulator-name = "vtt_ddr";
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <750000>;
> + regulator-always-on;
> + regulator-over-current-protection;
> + };
> +
> + vdd_usb: ldo4 {
> + regulator-name = "vdd_usb";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + interrupts = <IT_CURLIM_LDO4 0>;
> + };
> +
> + vdda: ldo5 {
> + regulator-name = "vdda";
> + regulator-min-microvolt = <2900000>;
> + regulator-max-microvolt = <2900000>;
> + interrupts = <IT_CURLIM_LDO5 0>;
> + regulator-boot-on;
> + };
> +
> + v1v2_hdmi: ldo6 {
> + regulator-name = "v1v2_hdmi";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-always-on;
> + interrupts = <IT_CURLIM_LDO6 0>;
> + };
> +
> + vref_ddr: vref_ddr {
> + regulator-name = "vref_ddr";
> + regulator-always-on;
> + regulator-over-current-protection;
> + };
> +
> + bst_out: boost {
> + regulator-name = "bst_out";
> + interrupts = <IT_OCP_BOOST 0>;
> + };
> +
> + vbus_otg: pwr_sw1 {
> + regulator-name = "vbus_otg";
> + interrupts = <IT_OCP_OTG 0>;
> + };
> +
> + vbus_sw: pwr_sw2 {
> + regulator-name = "vbus_sw";
> + interrupts = <IT_OCP_SWOUT 0>;
> + regulator-active-discharge;
> + };
> + };
> +
> + onkey {
> + compatible = "st,stpmic1-onkey";
> + interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
> + interrupt-names = "onkey-falling", "onkey-rising";
> + power-off-time-sec = <10>;
> + status = "okay";
Likewise, status = "okay" is implied already here.
> + };
> +
> + watchdog {
> + compatible = "st,stpmic1-wdt";
> + status = "disabled";
> + };
> + };
> +};
> +
> +&ipcc {
> + status = "okay";
> +};
> +
> +&iwdg2 {
> + timeout-sec = <32>;
> + status = "okay";
Without knowing anything about your hardware design, are you sure you don't
want to use the PMIC's watchdog instead? Imagine scaling down your CPU
voltage and then getting a watchdog reset. Your CPU might not appreciate
coming out of reset with full frequency but not enough voltage.
If you regular reset is via PMIC, your watchdog reset should go through
the PMIC as well.
> +};
> +
> +&m4_rproc {
> + memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
> + <&vdev0vring1>, <&vdev0buffer>;
> + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
> + mbox-names = "vq0", "vq1", "shutdown";
> + interrupt-parent = <&exti>;
> + interrupts = <68 1>;
> + status = "okay";
> +};
> +
> +&rng1 {
> + status = "okay";
> +};
> +
> +&rtc {
> + status = "okay";
> +};
> +
> +&sdmmc2 {
> + pinctrl-names = "default", "opendrain", "sleep";
> + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
> + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
> + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
> + non-removable;
> + no-sd;
> + no-sdio;
> + st,neg-edge;
> + bus-width = <4>;
> + vmmc-supply = <&v3v3>;
> + vqmmc-supply = <&v3v3>;
> + mmc-ddr-3_3v;
> + status = "okay";
> +};
> +
> diff --git a/arch/arm/boot/dts/stm32mp157c-odyssey.dts b/arch/arm/boot/dts/stm32mp157c-odyssey.dts
> new file mode 100644
> index 000000000000..6c1b091af14f
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp157c-odyssey.dts
> @@ -0,0 +1,72 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> +/*
> + * Copyright (C) 2020 Marcin Sloniewski <marcin.sloniewski at gmail.com>.
> + */
> +
> +/dts-v1/;
> +
> +#include "stm32mp157c-odyssey-som.dtsi"
> +
> +/ {
> + model = "Seeed Studio Odyssey-STM32MP157C Board";
> + compatible = "seeed,stm32mp157c-odyssey", "st,stm32mp157";
A compatible for the SoM here could be useful as well, e.g. if bootloader
needs to apply some fixups specific to the SoM.
> +
> + aliases {
> + ethernet0 = ðernet0;
> + serial0 = &uart4;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +};
> +
> +ðernet0 {
> + status = "okay";
> + pinctrl-0 = <ðernet0_rgmii_pins_a>;
> + pinctrl-1 = <ðernet0_rgmii_pins_sleep_a>;
> + pinctrl-names = "default", "sleep";
> + phy-mode = "rgmii-id";
> + max-speed = <1000>;
> + phy-handle = <&phy0>;
> +
> + mdio0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dwmac-mdio";
> + phy0: ethernet-phy at 0 {
Nitpick: I like it when there is a comment about the PHY in use.
> + reg = <0>;
Address 0 is the SMI broadcast address. Sure your PHY isn't
strapped for another, non-broadcast, address?
> + };
> + };
> +};
> +
> +&i2c1 {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&i2c1_pins_a>;
> + pinctrl-1 = <&i2c1_pins_sleep_a>;
> + i2c-scl-rising-time-ns = <100>;
> + i2c-scl-falling-time-ns = <7>;
> + status = "okay";
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +};
> +
> +&sdmmc1 {
> + pinctrl-names = "default", "opendrain", "sleep";
> + pinctrl-0 = <&sdmmc1_b4_pins_a>;
> + pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
> + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
> + cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> + disable-wp;
> + st,neg-edge;
> + bus-width = <4>;
> + vmmc-supply = <&v3v3>;
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart4_pins_a>;
> + status = "okay";
> +};
> +
>
Cheers,
Ahmad
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