[Question] About scaling factor of Enhanced Counter Virtualization

Marc Zyngier maz at kernel.org
Tue Jul 14 08:23:12 EDT 2020


On 2020-07-14 13:15, zhukeqian wrote:
> Hi Marc,
> 
> On 2020/7/14 19:34, Marc Zyngier wrote:
>> Hi Keqian,
>> 
>> On 2020-07-14 03:20, zhukeqian wrote:
>>> Hi all,
>>> 
>>> We are studying Enhanced Counter Virtualization (introduced by 
>>> ARMv8.6
>>> extension), and here is a question
>>> raised by Biaoxiang Ye <yebiaoxiang at huawei.com>:
>>> 
>>> Described in the ARMv8.6 Extension Specification:
>>> Note: the scaling factor CNTSCALE is designed as a 2.62 bit fixed
>>> point number, so permitting a scaling up by
>>> (nearly) a factor 4. The scaling factor CNTISCALE is signed as an 
>>> 8.56
>>> number for the scaling of the values
>>> written into the timers for comparison with the actual count. This
>>> implies that the greatest scaling down of the
>>> counter supported in (nearly) a factor of *512*.
>>> 
>>> We think the number "512" should be "256" (2^8), or do we miss 
>>> something?
>> 
>> This register doesn't seem to be described in ARM DDI 0487F.b,
>> which is the official documentation and does contain the ARMv8.6
>> material, including ARMv8.6-ECV.
>> 
>> Either you are looking at confidential information (and nobody
>> can answer you in public), or obsolete information (and nobody
>> knows what this is about).
>> 
> Well, it's alpha release version :( . Many thanks!

Wow. I suggest you discard this document, as it is obsolete.
ARMv8.6 is a released version of the architecture, and
everything should be in the ARM ARM.

         M.
-- 
Jazz is not dead. It just smells funny...



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