[PATCH v6 11/14] dt-bindings: PCI: Add EP mode dt-bindings for TI's J721E SoC

Rob Herring robh at kernel.org
Thu Jul 9 13:00:35 EDT 2020


On Wed, 08 Jul 2020 15:00:15 +0530, Kishon Vijay Abraham I wrote:
> Add PCIe EP mode dt-bindings for TI's J721E SoC.
> 
> Signed-off-by: Kishon Vijay Abraham I <kishon at ti.com>
> Reviewed-by: Rob Herring <robh at kernel.org>
> ---
>  .../bindings/pci/ti,j721e-pci-ep.yaml         | 89 +++++++++++++++++++
>  1 file changed, 89 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
> 


My bot found errors running 'make dt_binding_check' on your patch:

/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.example.dt.yaml: example-0: pcie-ep at d000000:reg:0: [0, 42991616, 0, 4096] is too long
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.example.dt.yaml: example-0: pcie-ep at d000000:reg:1: [0, 43020288, 0, 1024] is too long
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.example.dt.yaml: example-0: pcie-ep at d000000:reg:2: [0, 218103808, 0, 8388608] is too long
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.example.dt.yaml: example-0: pcie-ep at d000000:reg:3: [0, 268435456, 0, 134217728] is too long


See https://patchwork.ozlabs.org/patch/1325133

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:

pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade

Please check and re-submit.




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