[PATCH 9/9] spi: spi-sun6i: sun6i_spi_transfer_one(): enable RF_RDY interrupt only if needed
Marc Kleine-Budde
mkl at pengutronix.de
Mon Jul 6 03:18:01 EDT 2020
In sun6i_spi_transfer_one() the RX FIFO Ready (SUN6I_INT_CTL_RF_RDY) is
unconditionally enabled.
A RX interrupt is only needed, if more data than fits into the FIFO is going to
be received during this transfer. As the RX-FIFO is drained during transfer
complete interrupt, enable the RX FIFO Ready interrupt only if the data doesn't
fit into the FIFO.
Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
---
drivers/spi/spi-sun6i.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c
index 21b4436a72de..9379ce477bc3 100644
--- a/drivers/spi/spi-sun6i.c
+++ b/drivers/spi/spi-sun6i.c
@@ -195,7 +195,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
unsigned int mclk_rate, div, div_cdr1, div_cdr2, timeout;
unsigned int start, end, tx_time;
unsigned int trig_level;
- unsigned int tx_len = 0;
+ unsigned int tx_len = 0, rx_len = 0;
int ret = 0;
u32 reg;
@@ -250,10 +250,12 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
* If it's a TX only transfer, we don't want to fill the RX
* FIFO with bogus data
*/
- if (sspi->rx_buf)
+ if (sspi->rx_buf) {
reg &= ~SUN6I_TFR_CTL_DHB;
- else
+ rx_len = tfr->len;
+ } else {
reg |= SUN6I_TFR_CTL_DHB;
+ }
/* We want to control the chip select manually */
reg |= SUN6I_TFR_CTL_CS_MANUAL;
@@ -307,8 +309,10 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
sun6i_spi_fill_fifo(sspi);
/* Enable the interrupts */
- reg = SUN6I_INT_CTL_TC | SUN6I_INT_CTL_RF_RDY;
+ reg = SUN6I_INT_CTL_TC;
+ if (rx_len > sspi->fifo_depth)
+ reg |= SUN6I_INT_CTL_RF_RDY;
if (tx_len > sspi->fifo_depth)
reg |= SUN6I_INT_CTL_TF_ERQ;
--
2.27.0
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