[PATCH v2 0/2] at91-sama5d2_shdwc shutdown controller

Sebastian Reichel sre at kernel.org
Wed Jan 15 12:52:18 PST 2020


Hi

It wasn't lost, I just did not yet collect patches for the next
merge window. I queued the complete patchset to my for-next branch
now.

-- Sebastian

On Tue, Jan 14, 2020 at 10:34:55AM +0000, Claudiu.Beznea at microchip.com wrote:
> Hi Sebastian,
> 
> I know you may busy, I just want to be sure that you didn't forgot this series.
> 
> Thank you,
> Claudiu Beznea
> 
> On 20.12.2019 17:31, Claudiu Beznea wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> > 
> > PMC master clock register offset is different b/w sam9x60 and
> > other SoCs. Since there is a need of this register offset in
> > shutdown procedure we need to have it per SoC. This is what
> > this series does.
> > 
> > Changes in v2:
> > - do not use r5 as intermediary registers in at91_poweroff
> > 
> > Claudiu Beznea (2):
> >   power: reset: at91-poweroff: introduce struct shdwc_reg_config
> >   power: reset: at91-poweroff: use proper master clock register offset
> > 
> >  drivers/power/reset/at91-sama5d2_shdwc.c | 72 +++++++++++++++++++++-----------
> >  1 file changed, 47 insertions(+), 25 deletions(-)
> > 
> > --
> > 2.7.4
> > 
> > 
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