[PATCH] Revert "clk: imx: fix composite peripheral flags"

[Martin Kepplinger]

This reverts commit 936c383673b9e3007432f17140ac62de53d87db9.

It breaks clock reparenting via devfreq on the imx8mq used in the
Librem 5 phone. When switching dram frequency (which worked before)
the system now hangs after this where the dram_apb clock cannot be
set:

[  129.391755] imx8m-ddrc-devfreq 3d400000.memory-controller: failed to
set dram_apb parent: -16
[  129.391959] imx8m-ddrc-devfreq 3d400000.memory-controller: ddrc
failed freq switch to 25000000 from 800000000: error -16. now at 25000000
[  129.406133] imx8m-ddrc-devfreq 3d400000.memory-controller: failed to
update frequency from PM QoS (-16)

Note that on the Librem 5 devkit that uses a different revision of the
imx8mq SoC, the added flag does *not* break said clock reparenting so
there might be subtle differences here.

Signed-off-by: Martin Kepplinger <martin.kepplinger at puri.sm>
---
 drivers/clk/imx/clk-composite-8m.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c
index 2c309e3dc8e3..78fb7e52a42a 100644
--- a/drivers/clk/imx/clk-composite-8m.c
+++ b/drivers/clk/imx/clk-composite-8m.c
@@ -216,7 +216,6 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,
 		div->width = PCG_PREDIV_WIDTH;
 		divider_ops = &imx8m_clk_composite_divider_ops;
 		mux_ops = &clk_mux_ops;
-		flags |= CLK_SET_PARENT_GATE;
 	}
 
 	div->lock = &imx_ccm_lock;
-- 
2.20.1