[PATCH v1] scsi: ufs-mediatek: Enable UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL
Stanley Chu
stanley.chu at mediatek.com
Sun Dec 27 21:00:14 EST 2020
Hi Asutosh,
On Sun, 2020-12-27 at 17:32 -0800, Asutosh Das (asd) wrote:
> On 12/24/2020 5:47 AM, Stanley Chu wrote:
> > Hi Avri, Bean,
> >
> > On Thu, 2020-12-24 at 13:01 +0100, Bean Huo wrote:
> >> On Thu, 2020-12-24 at 11:03 +0000, Avri Altman wrote:
> >>>>> Do you see any substantial benefit of having
> >>>>> fWriteBoosterBufferFlushEn
> >>>>> disabled?
> >>>>
> >>>> 1. The definition of fWriteBoosterBufferFlushEn is that host allows
> >>>> device to do flush in anytime after fWriteBoosterBufferFlushEn is
> >>>> set as
> >>>> on. This is not what we want.
> >>>>
> >>>> Just Like BKOP, We do not want flush happening beyond host's
> >>>> expected
> >>>> timing that device performance may be "randomly" dropped.
> >>>
> >>> Explicit flush takes place only when the device is idle:
> >>> if fWriteBoosterBufferFlushEn is set, the device is idle, and before
> >>> h8 received.
> >>> If a request arrives, the flush operation should be halted.
> >>> So no performance degradation is expected.
> >>
> >> Hi Stanley
> >>
> >> Avri's comment is correct, fWriteBoosterBufferFlushEn==1, device will
> >> flush only when it is in idle, once there is new incoming request, the
> >> flush will be suspended. You should be very careful when you want to
> >> skip this stetting of this flag.
> >
> > Very appreciate your the clarification.
> >
> > However similar to "Background Operations Termination Latency", while
> > the next request comes, device may need some time to suspend on-going
> > flush operations. This delay may "randomly" degrade the performance
> > right?
> >
>
> Have you actually seen this happening? I've not come across any random
> performance degradation concerns, hence asking.
>
> From what I've observed is the handling of WB buffer flush depends on
> how flash vendors implement it. Some vendors that I've seen just create
> a separate WB buffer in an instant. I don't know the intricacies of
> their implementation, but I guess the new WB buffer handles the requests
> while the previous one is being flushed.
> Anyway, for Qualcomm platforms we plan to have
> fWriteBoosterBufferFlushEn=1 by default.
Thanks for above information and discussion : )
Actually we've not come across any random performance degradation due to
fWriteBoosterBufferFlushEn=1 as well. Since the implementation of
fWriteBoosterBufferFlushEn may differ by different vendors, we would
like to keep current configuration used in our mass-produced products
first.
But this is an interesting topic for possible termination latency of
WriteBooster flush. Maybe we could discuss with vendors to explicitly
define the required latency in UFS specification, just like "Background
Operations Termination Latency"? Then host can choose the best
configuration according to the definition provided by the device.
Thanks.
Stanley Chu
>
> > Since the configuration, i.e., enable
> > fWriteBoosterBufferFlushDuringHibernate only with
> > fWriteBoosterBufferFlushEn disabled, has been applied in many of our
> > mass-produced products these yeas, we would like to keep it unless the
> > new setting has obvious benefits.
> >
> > Thanks,
> > Stanley Chu
> >
> >>
> >> Bean
> >>
> >
>
>
More information about the linux-arm-kernel
mailing list