Quoting Claudiu Beznea (2020-11-19 07:43:12) > Allow runtime frequency changes for PLLs registered with proper flags. > This is necessary for CPU PLL on SAMA7G5 which is used by DVFS. > > Signed-off-by: Claudiu Beznea <claudiu.beznea at microchip.com> > --- Applied to clk-next