[PATCH v2 4/4] arm64: dts: add support for Marvell cn9130-crb platform

[Andrew Lunn]

On Thu, Dec 17, 2020 at 09:55:42AM +0200, kostap at marvell.com wrote:
> From: Konstantin Porotchkin <kostap at marvell.com>
> 
> The Marvell reference platform CN9130-CRB is a small form factor
> board in a metal case. The platform is based on CN9130 SoC with
> addition of 8 Gigabit ports SOHO Ethernet switch.
> The reference platform features the following:
> * Up to 4 CPU cores ARMv8 Cortex-A72 CPU
> * CPU core operating speed of up to 2.2GHz
> * DDR4 DIMM – 8GB 64bit+ECC @ 2400Mhz.
> * 1x eMMC 8GB device
> * 1x uSD card 4 bits port on CP
> * 1x 128MB SPI NOR flash memory
> * 1x USB 3.0 Host port (Type A)
> * 1x SATA Gen3 via M.2
> * 1x USB 3.0 via M.2
> * 1x SIM card slot
> * 1x 1G Ethernet port via RGMII
> * 1x 10G switch port over SFP+ connector
> * 8x 1G ports through 88E6393X switch via XFI
> * 1x 2.5G/1G/100M/10M port via HS_SGMII
> * 1x PCI Express (PCIe)x1 Gen 3.0
> * 1x PCI Express (PCIe)x4 Gen 3.0 via NVMe M.2
> * JTAG port
> 
> The plaform supports two HW configurations - "A" and "B"
> CN9130-CRB-A
> * AP-MPP configuration: SDIO, UART
> * CP0 Serdes configuration:
> 	* Lane0-3: NVMe (PCIe x4)
> 	* Lane4: XFI
> 	* Lane5: HS_SGMII
> 
> 2. CN9130-CRB-B
> * AP-MPP configuration: SDIO, UART
> * CP0-MPP configuration: RGMII, SDIO, I2C0, I2C1, SMI, XSMI
> * CP0 Serdes configuration:
> 	* Lane0: PCIe x1
> 	* Lane1: USB3_0 x1
> 	* Lane2: SATA x1
> 	* Lane3: USB3_1 x1
> 	* Lane4: XFI
> 	* Lane5: HS_SGMII
> 
> Signed-off-by: Konstantin Porotchkin <kostap at marvell.com>

Reviewed-by: Andrew Lunn <andrew at lunn.ch>

    Andrew