[PATCH v3 1/5] drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable()

Liu Ying victor.liu at nxp.com
Thu Dec 10 20:46:18 EST 2020

The Northwest Logic MIPI DSI host controller embedded in i.MX8qxp
works with a Mixel MIPI DPHY + LVDS PHY combo to support either
a MIPI DSI display or a LVDS display.  So, this patch calls
phy_set_mode() from nwl_dsi_enable() to set PHY mode to MIPI DPHY

Cc: Guido Günther <agx at sigxcpu.org>
Cc: Robert Chiras <robert.chiras at nxp.com>
Cc: Martin Kepplinger <martin.kepplinger at puri.sm>
Cc: Andrzej Hajda <a.hajda at samsung.com>
Cc: Neil Armstrong <narmstrong at baylibre.com>
Cc: Laurent Pinchart <Laurent.pinchart at ideasonboard.com>
Cc: Jonas Karlman <jonas at kwiboo.se>
Cc: Jernej Skrabec <jernej.skrabec at siol.net>
Cc: David Airlie <airlied at linux.ie>
Cc: Daniel Vetter <daniel at ffwll.ch>
Cc: NXP Linux Team <linux-imx at nxp.com>
Reviewed-by: Guido Günther <agx at sigxcpu.org>
Signed-off-by: Liu Ying <victor.liu at nxp.com>
* No change.

* Add Guido's R-b tag.

 drivers/gpu/drm/bridge/nwl-dsi.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c
index 66b6740..be6bfc5 100644
--- a/drivers/gpu/drm/bridge/nwl-dsi.c
+++ b/drivers/gpu/drm/bridge/nwl-dsi.c
@@ -678,6 +678,12 @@ static int nwl_dsi_enable(struct nwl_dsi *dsi)
 		return ret;
+	ret = phy_set_mode(dsi->phy, PHY_MODE_MIPI_DPHY);
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "Failed to set DSI phy mode: %d\n", ret);
+		goto uninit_phy;
+	}
 	ret = phy_configure(dsi->phy, phy_cfg);
 	if (ret < 0) {
 		DRM_DEV_ERROR(dev, "Failed to configure DSI phy: %d\n", ret);

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