[PATCH 1/5] Documentation: bindings: clk: Add bindings for i.MX8MM BLK_CTL

Frieder Schrempf frieder.schrempf at kontron.de
Thu Dec 10 10:14:50 EST 2020


On 30.11.20 16:43, Adam Ford wrote:
> On Mon, Nov 30, 2020 at 5:47 AM Frieder Schrempf
> <frieder.schrempf at kontron.de> wrote:
>> Hi,
>> On 07.10.20 22:50, Marek Vasut wrote:
>>> On 10/7/20 10:17 PM, Adam Ford wrote:
>>>> On Wed, Oct 7, 2020 at 3:08 PM Adam Ford <aford173 at gmail.com> wrote:
>>>>> On Wed, Oct 7, 2020 at 3:03 PM Marek Vasut <marex at denx.de> wrote:
>>>>>> On 10/7/20 9:52 PM, Adam Ford wrote:
>>>>>>> On Sun, Oct 4, 2020 at 12:53 AM Marek Vasut <marex at denx.de> wrote:
>>>>>>>> Add the i.MX8MM BLK_CTL compatible string to the list.
>>>>>> [...]
>>>>>>>> ---
>>>>>>>>    Documentation/devicetree/bindings/clock/fsl,imx-blk-ctl.yaml | 1 +
>>>>>>>>    1 file changed, 1 insertion(+)
>>>>>>> Is there a DTSI change part of this patch?  I was going to try to test
>>>>>>> it, but  I am not seeing a change to the imx8mm.dtsi, and I am not
>>>>>>> sure where to put the node.
>>>>>> There are in fact quite a few other pieces you need to have in place,
>>>>>> this patchset in itself is not particularly useful, it is just infra for
>>>>>> the LCDIF and MIPI DSIM block control. You might want to wait until they
>>>>>> all land in next and test that result.
>>>>> I have several patches in place, the GPCv2, this block driver,
>>>>> enabling GPU DT node, I'm also working on the DSIM patch you posted.
>>>>> I was hoping to test them all together and reply to the various
>>>>> threads with tested-by.  I also want to get my device tree stuff ready
>>>>> on the beacon boards so when everything lands, I can post DTS updates
>>>>> to enable the LCDIF, DSI, and the HDMI bridge.
>>>>> If you have a repo somewhere that has all these combined, I can just
>>>>> work on the final layer to enable the device tree plumbing on my
>>>>> board.  I just need the imx8mm.dtsi changes for this, DSIM, and the
>>>>> LCDIF so I can finish the task.
>>>> On that note, I also have a i.MX8M Nano board which is similar to my
>>>> 8MM.  If I understood the 8MM clock block driver better, I hope to
>>>> adapt your changes for the Nano too.  Once the GPCv2 driver is
>>>> accepted, I was also going to look at updating it to support the Nano
>>>> as well which also has the same DSIM and LCDIF as the 8MM as well and
>>>> a better GPU than the Mini but lacking the VPU.
>>> I don't have a branch, but I sent you the collected patches off-list.
>> I would also be interested in the patch collection for BLK_CTL, DSIM,
>> etc. Marek, would you mind sending me those, too?
>> Adam, did you already set up a branch and do some tests with the full stack?
> Frieder,
> I have been monitoring some of the activity on the BLK_CTL.  It seems
> like there is some disagreement on how to connect the power domain
> controller with the BLK_CTL.  Someone reported that it causes a hang
> on the 8MP, so until that gets resolved, I doubt we'll be able to use
> the display system.  Some of the DSIM changes happening are being
> pushed back for further changes, so it seems like having the full
> integration might be a while.

I have pulled all the latest patches, including Marek's off-list patches 
together in one branch based on v5.10-rc7 [1] if anyone is interested.

I added some fixes on top, that I needed to get my display behind 
another Toshiba DSI-DPI bridge working. Those are probably not 
upstreamable at all and need further investigation.

I'm hoping to reply to the individual threads for more feedback. I see 
that there are some blocking issues, but we hopefully get them resolved 


[1] https://github.com/fschrempf/linux/commits/v5.10-mx8mm-graphics

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