[PATCH v9 3/4] phy: Add Sparx5 ethernet serdes PHY driver

Steen Hegelund steen.hegelund at microchip.com
Thu Dec 10 09:59:35 EST 2020


On 10.12.2020 15:16, Andrew Lunn wrote:
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>
>> > So why are returning link up information?
>>
>> Yes that was a bit of a hijacking of the function.  I will remove that.
>> I also removed the dependency on this behaviour in the client driver in the
>> meantime.
>>
>> I think a status function on the generic phy would be useful, but I will
>> take that as separate issue.
>
>In this context of an Ethernet SERDES, do you actually need it? You
>would normally look at the PCS link status to determine if the link is
>up.  But it is useful debug information. If the PCS is down, but the
>PHY indicates up, you can guess you have a protocol misconfiguration.

Yes - you are probably right about that.  I have been exposing this via
a procfs interface during the development phase, and it was really
useful to have, to track down the origin of the problem in certain situations.

But on a system level, the PCS link would have the final say anyway.
>
>What exactly does link at this level mean? And thinking of the wider
>uses of the PHY subsystem, what would link mean at this level for
>SATA, PCIe, USB? Don't these all have some protocol level above
>similar to Ethernet PCS which is the real determiner of link?

Yes - I think this is really only a debug feature.  No need to force
this on the other PHY categories.


>
>     Andrew

Thanks for your comments, Andrew.

BR
Steen

---------------------------------------
Steen Hegelund
steen.hegelund at microchip.com



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