[PATCH v2 12/13] arm64: dts: imx8mm: add GPC node and power domains

Frieder Schrempf frieder.schrempf at kontron.de
Wed Dec 9 10:26:09 EST 2020


Hi Lucas,

On 05.11.20 18:44, Lucas Stach wrote:
> This adds the DT nodes to describe the power domains available on the
> i.MX8MM. Things are a bit more complex compared to other GPCv2 power
> domain setups, as there is now a hierarchy of domains where complete
> subsystems (HSIO, GPU, DISPLAY) can be gated as a whole, but also
> fine granular gating within those subsystems is possible.
> 
> Note that this is still incomplete, as both VPU and DISP domains are
> missing their reset clocks. Those aren't directly sourced from the CCM,
> but have another level of clock gating in the BLKCTL of those domains,
> which needs a separate driver.
> 
> Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
> ---
>   arch/arm64/boot/dts/freescale/imx8mm.dtsi | 58 +++++++++++++++++++++++
>   1 file changed, 58 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index b83f400def8b..c21901a8aea9 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -4,6 +4,8 @@
>    */
>   
>   #include <dt-bindings/clock/imx8mm-clock.h>
> +#include <dt-bindings/power/imx8mm-power.h>
> +#include <dt-bindings/reset/imx8mq-reset.h>
>   #include <dt-bindings/gpio/gpio.h>
>   #include <dt-bindings/input/input.h>
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -547,6 +549,62 @@
>   				interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
>   				#reset-cells = <1>;
>   			};
> +
> +			gpc: gpc at 303a0000 {
> +				compatible = "fsl,imx8mm-gpc";
> +				reg = <0x303a0000 0x10000>;
> +				interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
> +				interrupt-parent = <&gic>;
> +				interrupt-controller;
> +				#interrupt-cells = <3>;
> +
> +				pgc {
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +
> +					pgc_hsiomix: power-domain at 0 {
> +						#power-domain-cells = <0>;
> +						reg = <IMX8MM_POWER_DOMAIN_HSIOMIX>;
> +						clocks = <&clk IMX8MM_CLK_USB_BUS>;
> +					};
> +
> +					pgc_pcie: power-domain at 1 {
> +						#power-domain-cells = <0>;
> +						reg = <IMX8MM_POWER_DOMAIN_PCIE>;
> +						power-domains = <&pgc_hsiomix>;
> +					};
> +
> +					pgc_otg1: power-domain at 2 {
> +						#power-domain-cells = <0>;
> +						reg = <IMX8MM_POWER_DOMAIN_OTG1>;
> +						power-domains = <&pgc_hsiomix>;
> +					};
> +
> +					pgc_otg2: power-domain at 3 {
> +						#power-domain-cells = <0>;
> +						reg = <IMX8MM_POWER_DOMAIN_OTG2>;
> +						power-domains = <&pgc_hsiomix>;
> +					};

I'm currently doing some testing on top of v5.10-rc with GPC, BLK-CTL, 
DSIM, etc. I noticed that as soon as I add the nodes above for HSIO/OTG 
(even without referencing them elsewhere) my system freezes on 
suspend/resume.

The same problem exists when I remove the power domains for HSIO/USB and 
add the ones for DISPMIX and DSI to test Marek's work on BLK-CTL.

I'm not really sure at what point exactly the system freezes but this is 
what I see (no_console_suspend is set) and the system does not wake up 
anymore:

echo mem > /sys/power/state
[   13.888711] PM: suspend entry (deep)
[   13.892429] Filesystems sync: 0.000 seconds
[   13.907231] Freezing user space processes ... (elapsed 0.031 seconds) 
done.
[   13.945407] OOM killer disabled.
[   13.948642] Freezing remaining freezable tasks ... (elapsed 0.001 
seconds) done.
[   13.957216] printk: Suspending console(s) (use no_console_suspend to 
debug)

Any ideas?

Thanks
Frieder

> +
> +					pgc_gpumix: power-domain at 4 {
> +						#power-domain-cells = <0>;
> +						reg = <IMX8MM_POWER_DOMAIN_GPUMIX>;
> +						clocks = <&clk IMX8MM_CLK_GPU_BUS_ROOT>,
> +						         <&clk IMX8MM_CLK_GPU_AHB>;
> +					};
> +
> +					pgc_gpu: power-domain at 5 {
> +						#power-domain-cells = <0>;
> +						reg = <IMX8MM_POWER_DOMAIN_GPU>;
> +						clocks = <&clk IMX8MM_CLK_GPU_AHB>,
> +						         <&clk IMX8MM_CLK_GPU_BUS_ROOT>,
> +						         <&clk IMX8MM_CLK_GPU2D_ROOT>,
> +						         <&clk IMX8MM_CLK_GPU3D_ROOT>;
> +						resets = <&src IMX8MQ_RESET_GPU_RESET>;
> +						power-domains = <&pgc_gpumix>;
> +					};
> +				};
> +			};
>   		};
>   
>   		aips2: bus at 30400000 {
> 



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